From patchwork Thu Sep 5 13:00:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 825649 Delivered-To: patch@linaro.org Received: by 2002:adf:a345:0:b0:367:895a:4699 with SMTP id d5csp288098wrb; Thu, 5 Sep 2024 06:05:31 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVYJElovVJYD6BJO9K0LcLz+vdoqpQm+jlgKLgAcRpCfxlD1dU4IFU/AwmKUJWjGWStBjCauw==@linaro.org X-Google-Smtp-Source: AGHT+IEkz4z61TZ4/t9xK7Nf3TRiKeKY10uGiAIN+WRZ50wvQTUxxlw6GuA81TS1eCybJukUiqaf X-Received: by 2002:a05:622a:1a27:b0:447:f292:e4b5 with SMTP id d75a77b69052e-457f8b96e8amr81598901cf.9.1725541531614; Thu, 05 Sep 2024 06:05:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725541531; cv=none; d=google.com; s=arc-20160816; b=xK0Ag8AJot1DdmaOK6mmoFTwguVfL38X3IMFbUsEMSDShwjlHMWPp7ZcLnmFa23b/7 1wPz2GWvRIk44KTH9rM7pmstWojuAogt02OLFlFuXO+14UmBaEWT0MomWpjwDk79nrtJ nKyv0VtO6f+3VXG5vOLioQzUxlE2lP58FoYfKb+Qw/TojXb0gtdzUR7mMiRtSpf+ZOj3 Efk81+hrW5N8ZyPNsqee0jge0AvviP9Sf6CKxinlsFAtU811w3UQL+T3xNO+VpI3+LAi FOzMj/zyYMdZ1COJcrXCbmwdFxbGXkVVNA+t5vohvJhkvhGBaJtUv/IKENVgBtD7uHn4 wXPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Gb8lVmPrQ0oPSchhOZdAI9RN7s16BrWzuHYxkg2Mfqs=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=VdxR6rpNS4NnXW+P+4x+M2Bq9ldMZk5o5yxgYA7L0rSgNeY7auOQM0Q9MNx0QvZlSc USNPn1kEKaORqMMmEWxMKIqhA0PCdTHHXsNs6mcSuCetgb9Q03E2xoCTE7/vV/wMSqJT YUHQNwOcHWHP5582YzkY20TFeJmK0IVQcOB4zVZzr+p5dXCty1YG8qb8dWgpq7U3rYyP r4YxkbGCwzC/w9qtz/fnKuxQj+UOr2UVMYBq2WmTVj54TbCCZZ4uFPQr8YxUz2a58UK+ jZR094XycYRGPnPz60//t4pYozfFEHM4AmbXQpvwKA7gCBMaNdW2XngClOdmP312a4nr 1peA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aQfTejeL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id ada2fe7eead31-49a5f419c7esi537283137.84.2024.09.05.06.05.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 05 Sep 2024 06:05:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aQfTejeL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1smC70-0001Df-Th; Thu, 05 Sep 2024 09:01:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1smC6u-0000yQ-Cg for qemu-devel@nongnu.org; Thu, 05 Sep 2024 09:01:17 -0400 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1smC6s-0001jF-6H for qemu-devel@nongnu.org; Thu, 05 Sep 2024 09:01:16 -0400 Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-42bbd0a40faso6783195e9.1 for ; Thu, 05 Sep 2024 06:01:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1725541268; x=1726146068; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=Gb8lVmPrQ0oPSchhOZdAI9RN7s16BrWzuHYxkg2Mfqs=; b=aQfTejeLUtYQx62GFyZypbn949Z7M4mklvfC2DC71cbbR/g8VQj4k+BXqzYx0wWI+f rfkKVuxFL1h5D0MWaMGfysx4lGMylBi76+P/nBmAvyHaVXckN4fkm+SueFpIlVvFpSWn hk2P6QBsSpOgrHzDMdxLb2IM0jHxiQl8QbF53JSkKz4+Xgw/G9lmk6o0fSIFj6IIEOvK EzQK0MAkuGK0PcenYsTFlzHj+J3YzcLj96IA14c5XYg1srsBLPlJKgvYjA32I5/U8GiP FPnMx3LH9335Kg7hyeFrAX9QS2OZT2cq8fsojEUPMW+E6k7dTA4kDS2Sa0+WqqAjuonB Qttw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725541268; x=1726146068; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Gb8lVmPrQ0oPSchhOZdAI9RN7s16BrWzuHYxkg2Mfqs=; b=QRSXKuTniFYxQLqNmMta5JyBnwFQsSUwkp3rdNkE3XhppbXr5z6t8gykfkWnix8wSB yM//WvcMR6asas78L2z5ijdN/2gAMoHSXePdLXhYZz7dsps0+cZ8/krw+dgTThYyI3Kp ITLeoMoZ2dG7ohaoXT7vOkxQqS5bIXYmBCyOtujkR+JbpgW/iKUiLNM7p4ytxSw4Nl87 05Q/s+grgEgqLI/T7G5/D0H5xVNc8t5Oi/lc0De0IEnajaIVFitSZ6I8spcT7VDFSU4R 8OUuU+6NhYWU0EpdVronqDi/68JTv0p892DAxtEP9ZLtoF8ZaPJYRR2iVXVRsex9tm8+ wpoA== X-Gm-Message-State: AOJu0YyVA290M789kGGGHGqnmAcStcOC0gHFfPLdb9IxddG2pBWlnupd drXbwiaNm2UWBgs28fkQLvRHiI5vN5Oy47MhmIjzkH0tG2JfhH+t4C+052W5VvWmwpfWAGtKp/A p X-Received: by 2002:a05:6000:1147:b0:374:c283:f7b7 with SMTP id ffacd0b85a97d-374ecc8f661mr8584121f8f.21.1725541266702; Thu, 05 Sep 2024 06:01:06 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42bb6e355dfsm232251365e9.46.2024.09.05.06.01.06 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Sep 2024 06:01:06 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/25] target/arm: Pass env pointer through to gvec_bfmmla helper Date: Thu, 5 Sep 2024 14:00:40 +0100 Message-Id: <20240905130100.298768-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240905130100.298768-1-peter.maydell@linaro.org> References: <20240905130100.298768-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Pass the env pointer through to the gvec_bfmmla helper, so we can use it to add support for FEAT_EBF16. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/helper.h | 4 ++-- target/arm/tcg/translate-a64.c | 2 +- target/arm/tcg/translate-neon.c | 4 ++-- target/arm/tcg/translate-sve.c | 2 +- target/arm/tcg/vec_helper.c | 3 ++- 5 files changed, 8 insertions(+), 7 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index e197b5b1d2c..b463be38c52 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -1032,8 +1032,8 @@ DEF_HELPER_FLAGS_6(gvec_bfdot, TCG_CALL_NO_RWG, DEF_HELPER_FLAGS_6(gvec_bfdot_idx, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, env, i32) -DEF_HELPER_FLAGS_5(gvec_bfmmla, TCG_CALL_NO_RWG, - void, ptr, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_6(gvec_bfmmla, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, env, i32) DEF_HELPER_FLAGS_6(gvec_bfmlal, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, ptr, i32) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index c7876513c72..6d5f12e8f55 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -5637,7 +5637,7 @@ TRANS_FEAT(SDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_sdot_b) TRANS_FEAT(UDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_udot_b) TRANS_FEAT(USDOT_v, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_usdot_b) TRANS_FEAT(BFDOT_v, aa64_bf16, do_dot_vector_env, a, gen_helper_gvec_bfdot) -TRANS_FEAT(BFMMLA, aa64_bf16, do_dot_vector, a, gen_helper_gvec_bfmmla) +TRANS_FEAT(BFMMLA, aa64_bf16, do_dot_vector_env, a, gen_helper_gvec_bfmmla) TRANS_FEAT(SMMLA, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_smmla_b) TRANS_FEAT(UMMLA, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_ummla_b) TRANS_FEAT(USMMLA, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_usmmla_b) diff --git a/target/arm/tcg/translate-neon.c b/target/arm/tcg/translate-neon.c index 7de157c539c..13cd31aad42 100644 --- a/target/arm/tcg/translate-neon.c +++ b/target/arm/tcg/translate-neon.c @@ -3730,8 +3730,8 @@ static bool trans_VMMLA_b16(DisasContext *s, arg_VMMLA_b16 *a) if (!dc_isar_feature(aa32_bf16, s)) { return false; } - return do_neon_ddda(s, 7, a->vd, a->vn, a->vm, 0, - gen_helper_gvec_bfmmla); + return do_neon_ddda_env(s, 7, a->vd, a->vn, a->vm, 0, + gen_helper_gvec_bfmmla); } static bool trans_VFMA_b16(DisasContext *s, arg_VFMA_b16 *a) diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c index eb77c943c8f..9e2536dfe99 100644 --- a/target/arm/tcg/translate-sve.c +++ b/target/arm/tcg/translate-sve.c @@ -7137,7 +7137,7 @@ TRANS_FEAT(BFDOT_zzzz, aa64_sve_bf16, gen_gvec_env_arg_zzzz, TRANS_FEAT(BFDOT_zzxz, aa64_sve_bf16, gen_gvec_env_arg_zzxz, gen_helper_gvec_bfdot_idx, a) -TRANS_FEAT_NONSTREAMING(BFMMLA, aa64_sve_bf16, gen_gvec_ool_arg_zzzz, +TRANS_FEAT_NONSTREAMING(BFMMLA, aa64_sve_bf16, gen_gvec_env_arg_zzzz, gen_helper_gvec_bfmmla, a, 0) static bool do_BFMLAL_zzzw(DisasContext *s, arg_rrrr_esz *a, bool sel) diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c index a2c62a86d84..616ec54bb77 100644 --- a/target/arm/tcg/vec_helper.c +++ b/target/arm/tcg/vec_helper.c @@ -2847,7 +2847,8 @@ void HELPER(gvec_bfdot_idx)(void *vd, void *vn, void *vm, clear_tail(d, opr_sz, simd_maxsz(desc)); } -void HELPER(gvec_bfmmla)(void *vd, void *vn, void *vm, void *va, uint32_t desc) +void HELPER(gvec_bfmmla)(void *vd, void *vn, void *vm, void *va, + CPUARMState *env, uint32_t desc) { intptr_t s, opr_sz = simd_oprsz(desc); float32 *d = vd, *a = va;