From patchwork Mon Aug 5 18:06:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 816750 Delivered-To: patch@linaro.org Received: by 2002:adf:e00d:0:b0:367:895a:4699 with SMTP id s13csp1469995wrh; Mon, 5 Aug 2024 11:08:27 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVdUjVr3RuXcZPzl/RcBPxeYe2GjaM1WYxVzXs5OL5gBM14SKxzgX/vklUpVDXahd6uZ6v035pbyb5LF/qPB2ew X-Google-Smtp-Source: AGHT+IHAFBqTSb2JkMZY1Sb/bHwmVheYF5BUOWhQHOYlV37uJMmWyveBMDCX9QbE9DLdBGVM284t X-Received: by 2002:a05:622a:1899:b0:447:e562:b64 with SMTP id d75a77b69052e-451892c6960mr145671291cf.64.1722881307649; Mon, 05 Aug 2024 11:08:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1722881307; cv=none; d=google.com; s=arc-20160816; b=MQbpRqngXAC/hGAno7B9Xf666MPaIDDilbe7l6cTR3DJCaNzWAcu1XMPPYFHvRCZhs mSHWE9EYIZ/OQNnebHJ3nkCmJHrZBaygjeZ7vQl6RKhzfV0FtWkdI+kmrIr5WjtjEGES pM0jgA741teBHT3cAmajYR8o7N1sM6drIksYe4afRfx5E8B+OWAvXnnRBRq79c89D2TA Ky7jXTiB7Pcs2dL54YMNXK2wxX9TdAMMvM3Buva9n051qAWJkyHrI2WVDh8VBzqGCHbl k1MwlPusRz7AOAmqc/tI0RoTCcAHkQzaBF9O8atuhE7GNrh4hPGrMpTJWhEgFcg6Hi1b p5EA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8/kSm1HWmhuEc0hDCxHXx4k+YsK8CefOInECn4KJlHc=; fh=9FIv2ryHyUdV0M0E/xImFOb7ha8RVmpB9WW8IcVSbKs=; b=sMolGX7SyA/VILaPpTOA+G59cTfYQ6P5+gn01Z0Ngt8veBoG8ya3KH092DZyM/Xu9L yhaCPLEnn+YZcR2Y5ChS9ID9PeypuG1nH9UNhwnwxarHyxwifCQBAUFul14mwKZTOywk dDRilPH1FcCp/JPidxrYi/nQFGiLdGv+CleMROqo/wgeJKqM8j3EuoOs50EZ77XRAxYW njS5nYi+39lZwCTOxzCXWnop9+DIxw4jwe6htkx8zSFdGD47IhbkY9ZSaNvs2s7djv+W dVBpkOItC8+TdSwQWJaxerwzV8L9QTyVBp6VolsTK+kI5t3hTOPXBM5XcfSA5JSmToHw YxAw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EB3viguV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-4518a7645a1si100108411cf.230.2024.08.05.11.08.27 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 05 Aug 2024 11:08:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EB3viguV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sb27a-0002sz-Iw; Mon, 05 Aug 2024 14:07:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sb27Y-0002fR-I4 for qemu-devel@nongnu.org; Mon, 05 Aug 2024 14:07:48 -0400 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sb27W-0006SQ-GZ for qemu-devel@nongnu.org; Mon, 05 Aug 2024 14:07:48 -0400 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-3687f91af40so6439383f8f.0 for ; Mon, 05 Aug 2024 11:07:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722881262; x=1723486062; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8/kSm1HWmhuEc0hDCxHXx4k+YsK8CefOInECn4KJlHc=; b=EB3viguV6aJnJKzA3/FJgVA8VPtXvCojjwanfyfDIUYCnddhw4I1TATfDSHrJHoTRE hpN0VAr9aZDMXarL3u5keg30hjKKi7D85Dqrb3+iFxlN2dSfBzGM185si2oac8E7T81t gvHV7+yT+/jsAm8VJSIeXpEsewtxMBHHGyWkXKDWArTe+4a7LMMLLIrEbmJuIW9MPkxB sYFrgxOAgvH4GJty74LMT4qiXwK1wnraV03Tb8F/46g5DRWQlXTphEdC8kS1SCrmxboC h++uNhd1brwpif+zdlOGP4wt2j15/5j/FvOWRd00RBJPXbkOT14ae4Xxr6qXYNZjy5Tp t5HQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722881262; x=1723486062; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8/kSm1HWmhuEc0hDCxHXx4k+YsK8CefOInECn4KJlHc=; b=NwE2LBUoI7IswwEyNxSIjlZRXROMVRJH0ey2zmR+fLalWqZHuLMd05zhLeSRrt11u2 XrA+DgkDjTajSXfk8P6CJpTe8BROaE+rgPVK7vGf4K6nAdGwx5OBfMVZYJH9YCBP68nF PQcnNTqkwcRc14GGcSaI3jaLygFPse19qyoEV/AkoQzgkqx4tjkv2EePHy5NXbOHMYnG pF7NKbjFLsXC3Zee4jc15En3XGninTDgxPUIe6Ti6aqiq8NYpCrDbajJX4hs5zaOVlwb NKVTuRBlOfV6/LBs8AW3jDmKvABSzMcaqp95q2cbP6pdJhkFzKRa2HG+mtUzrao8IhGL yz3Q== X-Gm-Message-State: AOJu0YwDczWlVUWWdSxRhlQpXj1Sr/oO2Pbwm79nLQBCdH9WOqQGkcSf BMXNri8F2DQhM2W1pRFjaMCjUUgn1eEqdgfrc+fUnXP2EnyedW1xQ9snJe7s4j7Ckmfk6eULe5v T X-Received: by 2002:a5d:5d86:0:b0:36b:c126:fe6d with SMTP id ffacd0b85a97d-36bc127010cmr5831283f8f.24.1722881262267; Mon, 05 Aug 2024 11:07:42 -0700 (PDT) Received: from m1x-phil.lan (cor91-h02-176-184-30-206.dsl.sta.abo.bbox.fr. [176.184.30.206]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36bbd05b92esm10890601f8f.85.2024.08.05.11.07.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 05 Aug 2024 11:07:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bibo Mao Cc: Song Gao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Jiaxun Yang Subject: [PATCH-for-9.1 v6 12/15] hw/intc/loongarch_ipi: Add loongarch IPI support Date: Mon, 5 Aug 2024 20:06:19 +0200 Message-ID: <20240805180622.21001-13-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240805180622.21001-1-philmd@linaro.org> References: <20240805180622.21001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao Loongarch IPI is added here, it inherits from class TYPE_LOONGSON_IPI_COMMON, and two interfaces get_iocsr_as() and cpu_by_arch_id() are added for Loongarch 3A5000 machine. It can be used when ipi is emulated in userspace with KVM mode. Signed-off-by: Bibo Mao [PMD: Rebased and simplified] Co-Developed-by: Philippe Mathieu-Daudé Reviewed-by: Bibo Mao Tested-by: Bibo Mao Signed-off-by: Philippe Mathieu-Daudé Acked-by: Song Gao Reviewed-by: Richard Henderson Reviewed-by: Jiaxun Yang Tested-by: Jiaxun Yang Message-Id: <20240718133312.10324-16-philmd@linaro.org> --- include/hw/intc/loongarch_ipi.h | 25 ++++++++++++ hw/intc/loongarch_ipi.c | 68 +++++++++++++++++++++++++++++++++ hw/intc/Kconfig | 4 ++ hw/intc/meson.build | 1 + 4 files changed, 98 insertions(+) create mode 100644 include/hw/intc/loongarch_ipi.h create mode 100644 hw/intc/loongarch_ipi.c diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h new file mode 100644 index 0000000000..276b3040a3 --- /dev/null +++ b/include/hw/intc/loongarch_ipi.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * LoongArch IPI interrupt header files + * + * Copyright (C) 2024 Loongson Technology Corporation Limited + */ + +#ifndef HW_LOONGARCH_IPI_H +#define HW_LOONGARCH_IPI_H + +#include "qom/object.h" +#include "hw/intc/loongson_ipi_common.h" + +#define TYPE_LOONGARCH_IPI "loongarch_ipi" +OBJECT_DECLARE_TYPE(LoongarchIPIState, LoongarchIPIClass, LOONGARCH_IPI) + +struct LoongarchIPIState { + LoongsonIPICommonState parent_obj; +}; + +struct LoongarchIPIClass { + LoongsonIPICommonClass parent_class; +}; + +#endif diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c new file mode 100644 index 0000000000..2ae1a42c46 --- /dev/null +++ b/hw/intc/loongarch_ipi.c @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * LoongArch IPI interrupt support + * + * Copyright (C) 2024 Loongson Technology Corporation Limited + */ + +#include "qemu/osdep.h" +#include "hw/boards.h" +#include "hw/intc/loongarch_ipi.h" +#include "target/loongarch/cpu.h" + +static AddressSpace *get_iocsr_as(CPUState *cpu) +{ + return LOONGARCH_CPU(cpu)->env.address_space_iocsr; +} + +static int archid_cmp(const void *a, const void *b) +{ + CPUArchId *archid_a = (CPUArchId *)a; + CPUArchId *archid_b = (CPUArchId *)b; + + return archid_a->arch_id - archid_b->arch_id; +} + +static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id) +{ + CPUArchId apic_id, *found_cpu; + + apic_id.arch_id = id; + found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, + ms->possible_cpus->len, + sizeof(*ms->possible_cpus->cpus), + archid_cmp); + + return found_cpu; +} + +static CPUState *loongarch_cpu_by_arch_id(int64_t arch_id) +{ + MachineState *machine = MACHINE(qdev_get_machine()); + CPUArchId *archid; + + archid = find_cpu_by_archid(machine, arch_id); + if (archid) { + return CPU(archid->cpu); + } + + return NULL; +} + +static void loongarch_ipi_class_init(ObjectClass *klass, void *data) +{ + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass); + + licc->get_iocsr_as = get_iocsr_as; + licc->cpu_by_arch_id = loongarch_cpu_by_arch_id; +} + +static const TypeInfo loongarch_ipi_types[] = { + { + .name = TYPE_LOONGARCH_IPI, + .parent = TYPE_LOONGSON_IPI_COMMON, + .class_init = loongarch_ipi_class_init, + } +}; + +DEFINE_TYPES(loongarch_ipi_types) diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index a2a0fdca85..dd405bdb5d 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -94,6 +94,10 @@ config LOONGSON_IPI bool select LOONGSON_IPI_COMMON +config LOONGARCH_IPI + bool + select LOONGSON_IPI_COMMON + config LOONGARCH_PCH_PIC bool select UNIMP diff --git a/hw/intc/meson.build b/hw/intc/meson.build index a09a527207..f4d81eb8e4 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -71,6 +71,7 @@ specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c')) +specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))