From patchwork Tue Jul 30 09:40:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 815297 Delivered-To: patch@linaro.org Received: by 2002:a5d:4acf:0:b0:367:895a:4699 with SMTP id y15csp215908wrs; Tue, 30 Jul 2024 02:44:29 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVfR6NkMYiPkbSOjR3di9tboorTHedAvBFEAIudI6ynJD/iY0ktYoV1yQTPCUro3EqSb0kYnMdAaFkjgkSGkALr X-Google-Smtp-Source: AGHT+IEfXCYLjCFR6GEWWvQYBRGkIvRRxTgBEoCvPqmW8XB0UK6it0ABuenzDs2WnMO6Q2YffiMf X-Received: by 2002:a05:6359:7c1f:b0:1ad:1ab6:b7d7 with SMTP id e5c5f4694b2df-1addc15997cmr1169819555d.12.1722332669026; Tue, 30 Jul 2024 02:44:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1722332668; cv=none; d=google.com; s=arc-20160816; b=s2m2AzfwqLrU0BhyCSmeJthKbmIDS+XrTCeX1n8LnWI1d4tszD69n8jdut+UHHTs0X 7x4zTtDGVLaE2tY59ahOe9obVei9wqf9hUdOWY9BXObgnD+6MXrTcf67lbemPdiSEwOD gTj/Gwsvo7SgdVNItGy7MI4xZKfCoBhNju4zwndFbmLAkiJNvO7mAlzHHETQeA4jaB3g B89BtaZtqJHeyZSXGb99nx/8kJfp2vlENjY8jnUMmtcfnATq58190hGrhXdcd2+iDgEA fJ6uzvRj+bifKIv+X3nyMZCKIeNtpvaXbHj7eUVelDSv9BuPlFC1axs/+E7ZTqAX2B2t lbfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=jfxWTbmPHfPItv3Jo669wf0TJh+oQpU/CHJm1l2IvZY=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=JTOwlPsHISCWoTNOIQDD7JEkgJ4IOmuOfYH5iyXr2ilqZC3VTPEGoFT7eodEUa5SM0 hVneDx6TNhF91p3w7k5MdMlkdKnWilK/cdPgBVnhB2CEIOKbKiUmkYw3qKFRMmJ9SUEk Nxdq/4UKt9fqO+a3QbU/MR7Bt9nsSzewxjgLKJ4bSfcIv8HVPbGQfljgob9BE19ORlak m0/jv9mCHEFL3bF6CQfz0P6316i6mYt8dsErigYx8HkOJFJmwWZXSwsYkaiw/icfHnVu bheLEJ/DHDPjgX3k2uW5SnYLfaJcHUW2a0YPmNZJLmmKZky9P26B7swbad6pYRQP/QgJ mgGA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f3x38ekk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6bb3f8cbfa3si120217166d6.109.2024.07.30.02.44.28 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 30 Jul 2024 02:44:28 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f3x38ekk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sYjLR-00044e-RB; Tue, 30 Jul 2024 05:40:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sYjLQ-0003y0-6Z for qemu-devel@nongnu.org; Tue, 30 Jul 2024 05:40:36 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sYjLO-0000eC-G1 for qemu-devel@nongnu.org; Tue, 30 Jul 2024 05:40:35 -0400 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-3684bea9728so2289809f8f.3 for ; Tue, 30 Jul 2024 02:40:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722332433; x=1722937233; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=jfxWTbmPHfPItv3Jo669wf0TJh+oQpU/CHJm1l2IvZY=; b=f3x38ekkwj/oKWFcFQEGzkUITXRcmlvJWTMZTO+sBE7c4qAZrvww9P86Np+PexAy7G /DivMIrFh9p/u4q+oXZYEVQ3dVX3Ajb/4bNz+ZNyd7uOZ1qr3Gv0obvHiLyzaQTZFCUJ KhtbWluwB3WeCp0k4/G7fc3H4umMuTTiWo83xN4k+RDcmGETZjIFYS3/+k9CLAUBf3PM uUsjPC6D3ktEMspJfYGvVAzL3XJD8SMo/U014sVylh9ngOpY6LYWauvVFYwLHljMDh8A YbCNXAW7PDuJnNrT7QOYO3XFusDWYFKrbCNBgeBDDy8Md8+po0VmDWttLAGJA6N9Lkkz +dfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722332433; x=1722937233; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jfxWTbmPHfPItv3Jo669wf0TJh+oQpU/CHJm1l2IvZY=; b=vbaD8wANyuFgSwXKHw9eEjdy49PxqbB52Xh+dZPpxmdJf88RDJrUJTah+GvsmaBYvq Au55G1OPt+Voe9U+1bQr587iyRnDrJWgFhcmSoZfT7j1HkbR7Wm6J/iF6nCKubmIeYpt LnBPcjLT5Ga+cxADnyJcwUwAhNgjWcXjxtRP7JP5e7OxplHlM0UDcfcL/Y/022hJ279a u0+WY67X4tnZAOk2LGhlDxeih+pCTfGMToJeOyU5l/zMHmPR/kgX8WE+2FX20sgyDYaA Npj6CyDnauHl6s6k7SpyKyu2Peb4WUXZDh352Yc7ZxblVGx9RPOLDsenP4vUpRr1szZ8 QRTg== X-Gm-Message-State: AOJu0YxK3/6PH0e6FUqiQ4FuDOAmRAuUlEV70IzPDz6I3LccLLBSvOVs qg2ViJBVBdUThyPV+TPP1aQ6akCggz4XuuoFldINx/eC3/E388re0G+mTJFgbQZfC54H5k0ZK/P B X-Received: by 2002:a05:6000:1546:b0:368:420e:b790 with SMTP id ffacd0b85a97d-36b5cef8f76mr8545304f8f.14.1722332433088; Tue, 30 Jul 2024 02:40:33 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36b36862549sm14194974f8f.106.2024.07.30.02.40.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jul 2024 02:40:32 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/21] system/physmem: Where we assume we have a RAM MR, assert it Date: Tue, 30 Jul 2024 10:40:20 +0100 Message-Id: <20240730094020.2758637-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240730094020.2758637-1-peter.maydell@linaro.org> References: <20240730094020.2758637-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In the functions invalidate_and_set_dirty() and cpu_physical_memory_snapshot_and_clear_dirty(), we assume that we are dealing with RAM memory regions. In this case we know that memory_region_get_ram_addr() will succeed. Assert this before we use the returned ram_addr_t in arithmetic. This makes Coverity happier about these functions: it otherwise complains that we might have an arithmetic overflow that stems from the possible -1 return from memory_region_get_ram_addr(). Resolves: Coverity CID 1547629, 1547715 Signed-off-by: Peter Maydell Reviewed-by: Peter Xu Reviewed-by: David Hildenbrand Message-id: 20240723170513.1676453-1-peter.maydell@linaro.org --- system/physmem.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/system/physmem.c b/system/physmem.c index 0e19186e1b4..94600a33ec3 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -923,13 +923,19 @@ DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty (MemoryRegion *mr, hwaddr offset, hwaddr length, unsigned client) { DirtyMemoryBlocks *blocks; - ram_addr_t start = memory_region_get_ram_addr(mr) + offset; + ram_addr_t start, first, last; unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL); - ram_addr_t first = QEMU_ALIGN_DOWN(start, align); - ram_addr_t last = QEMU_ALIGN_UP(start + length, align); DirtyBitmapSnapshot *snap; unsigned long page, end, dest; + start = memory_region_get_ram_addr(mr); + /* We know we're only called for RAM MemoryRegions */ + assert(start != RAM_ADDR_INVALID); + start += offset; + + first = QEMU_ALIGN_DOWN(start, align); + last = QEMU_ALIGN_UP(start + length, align); + snap = g_malloc0(sizeof(*snap) + ((last - first) >> (TARGET_PAGE_BITS + 3))); snap->start = first; @@ -2659,7 +2665,11 @@ static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr, hwaddr length) { uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr); - addr += memory_region_get_ram_addr(mr); + ram_addr_t ramaddr = memory_region_get_ram_addr(mr); + + /* We know we're only called for RAM MemoryRegions */ + assert(ramaddr != RAM_ADDR_INVALID); + addr += ramaddr; /* No early return if dirty_log_mask is or becomes 0, because * cpu_physical_memory_set_dirty_range will still call