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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3687868bb00sm2245597f8f.43.2024.07.19.11.11.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 06/16] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Date: Fri, 19 Jul 2024 20:10:31 +0200 Message-ID: <20240719181041.49545-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When implementing FIFO, this code will become more complex. Start by factoring it out to a new pl011_write_txdata() function. No functional change intended. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- hw/char/pl011.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 3d294c3b52..c2ee9b0321 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -221,6 +221,18 @@ static void pl011_loopback_tx(PL011State *s, uint32_t value) pl011_put_fifo(s, value); } +static void pl011_write_txdata(PL011State *s, uint8_t data) +{ + /* ??? Check if transmitter is enabled. */ + + /* XXX this blocks entire thread. Rewrite to use + * qemu_chr_fe_write and background I/O callbacks */ + qemu_chr_fe_write_all(&s->chr, &data, 1); + pl011_loopback_tx(s, data); + s->int_level |= INT_TX; + pl011_update(s); +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { @@ -388,14 +400,8 @@ static void pl011_write(void *opaque, hwaddr offset, switch (offset >> 2) { case 0: /* UARTDR */ - /* ??? Check if transmitter is enabled. */ ch = value; - /* XXX this blocks entire thread. Rewrite to use - * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(&s->chr, &ch, 1); - pl011_loopback_tx(s, ch); - s->int_level |= INT_TX; - pl011_update(s); + pl011_write_txdata(s, ch); break; case 1: /* UARTRSR/UARTECR */ s->rsr = 0;