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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3687868420fsm2231578f8f.3.2024.07.19.11.11.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 03/16] hw/char/pl011: Move pl011_put_fifo() earlier Date: Fri, 19 Jul 2024 20:10:28 +0200 Message-ID: <20240719181041.49545-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Avoid forward-declaring pl011_put_fifo() by moving it earlier. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/char/pl011.c | 46 ++++++++++++++++++++++------------------------ 1 file changed, 22 insertions(+), 24 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 260f5fc0bc..edb5395fb8 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -159,6 +159,28 @@ static inline void pl011_reset_fifo(PL011State *s) s->flags |= PL011_FLAG_RXFE | PL011_FLAG_TXFE; } +static void pl011_put_fifo(void *opaque, uint32_t value) +{ + PL011State *s = (PL011State *)opaque; + int slot; + unsigned pipe_depth; + + pipe_depth = pl011_get_fifo_depth(s); + slot = (s->read_pos + s->read_count) & (pipe_depth - 1); + s->read_fifo[slot] = value; + s->read_count++; + s->flags &= ~PL011_FLAG_RXFE; + trace_pl011_put_fifo(value, s->read_count); + if (s->read_count == pipe_depth) { + trace_pl011_put_fifo_full(); + s->flags |= PL011_FLAG_RXFF; + } + if (s->read_count == s->read_trigger) { + s->int_level |= INT_RX; + pl011_update(s); + } +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { @@ -314,8 +336,6 @@ static void pl011_loopback_mdmctrl(PL011State *s) pl011_update(s); } -static void pl011_put_fifo(void *opaque, uint32_t value); - static void pl011_loopback_tx(PL011State *s, uint32_t value) { if (!pl011_loopback_enabled(s)) { @@ -440,28 +460,6 @@ static int pl011_can_receive(void *opaque) return r; } -static void pl011_put_fifo(void *opaque, uint32_t value) -{ - PL011State *s = (PL011State *)opaque; - int slot; - unsigned pipe_depth; - - pipe_depth = pl011_get_fifo_depth(s); - slot = (s->read_pos + s->read_count) & (pipe_depth - 1); - s->read_fifo[slot] = value; - s->read_count++; - s->flags &= ~PL011_FLAG_RXFE; - trace_pl011_put_fifo(value, s->read_count); - if (s->read_count == pipe_depth) { - trace_pl011_put_fifo_full(); - s->flags |= PL011_FLAG_RXFF; - } - if (s->read_count == s->read_trigger) { - s->int_level |= INT_RX; - pl011_update(s); - } -} - static void pl011_receive(void *opaque, const uint8_t *buf, int size) { /*