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[176.184.43.20]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4264a2fca8bsm212580165e9.47.2024.07.09.08.27.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 09 Jul 2024 08:27:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , Andrew Jeffery , qemu-block@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Bin Meng , Joel Stanley , =?utf-8?q?Phi?= =?utf-8?q?lippe_Mathieu-Daud=C3=A9?= , Jamin Lin , Steven Lee , Troy Lee Subject: [PATCH v47 15/19] hw/sd/sdcard: Implement eMMC 'boot-mode' Date: Tue, 9 Jul 2024 17:25:52 +0200 Message-ID: <20240709152556.52896-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240709152556.52896-1-philmd@linaro.org> References: <20240709152556.52896-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Spec v4.3 chapter 7.2.2 "Boot operation": If the CMD line is held LOW for 74 clock cycles and more after power-up before the first command is issued, the slave recognizes that boot mode is being initiated and starts preparing boot data internally. Track uptime since last reset, add the sd_uptime_ns() helper. When the first command is received, check at least 74 clocks are elapsed (during the identification phase, at a 10kHz rate) then enable BOOT_MODE in the Ext_CSD register. Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/sd.c | 38 ++++++++++++++++++++++++++++++++++++++ hw/sd/trace-events | 1 + 2 files changed, 39 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index beb8e2730a..c7f8ea11c1 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -163,6 +163,8 @@ struct SDState { */ bool expecting_acmd; uint32_t blk_written; + int64_t reset_time_ns; + uint32_t cmd_count; uint64_t data_start; uint32_t data_offset; @@ -352,6 +354,11 @@ static uint8_t sd_crc7(const void *message, size_t width) return shift_reg; } +static int64_t sd_uptime_ns(SDState *sd) +{ + return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sd->reset_time_ns; +} + /* Operation Conditions register */ #define OCR_POWER_DELAY_NS 500000 /* 0.5ms */ @@ -479,6 +486,10 @@ static void emmc_set_cid(SDState *sd) #define CMULT_SHIFT 9 /* 512 times HWBLOCK_SIZE */ #define WPGROUP_SIZE (1 << (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT)) +#define OD_FREQ_MIN_HZ 10000 +#define OD_FREQ_MAX_HZ 400000 +#define BOOT_MODE_DELAY_CYCLES_MIN 74 + static const uint8_t sd_csd_rw_mask[16] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe, @@ -798,6 +809,8 @@ static void sd_reset(DeviceState *dev) sect = sd_addr_to_wpnum(size) + 1; + sd->reset_time_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + sd->cmd_count = 0; sd->state = sd_idle_state; /* card registers */ @@ -906,6 +919,18 @@ static const VMStateDescription emmc_extcsd_vmstate = { }, }; +static const VMStateDescription sdmmc_uptime_cmdcnt_vmstate = { + .name = "sd-card/uptime-command_count-state", + .version_id = 1, + .minimum_version_id = 1, + .needed = vmstate_needed_for_emmc, + .fields = (const VMStateField[]) { + VMSTATE_INT64(reset_time_ns, SDState), + VMSTATE_UINT32(cmd_count, SDState), + VMSTATE_END_OF_LIST() + }, +}; + static int sd_vmstate_pre_load(void *opaque) { SDState *sd = opaque; @@ -954,6 +979,7 @@ static const VMStateDescription sd_vmstate = { .subsections = (const VMStateDescription * const []) { &sd_ocr_vmstate, &emmc_extcsd_vmstate, + &sdmmc_uptime_cmdcnt_vmstate, NULL }, }; @@ -1980,6 +2006,16 @@ static sd_rsp_type_t sd_cmd_SEND_OP_COND(SDState *sd, SDRequest req) sd->state = sd_ready_state; } + if (sd_is_emmc(sd) && sd->cmd_count == 1) { + int64_t clk_cycles = sd_uptime_ns(sd) / OD_FREQ_MIN_HZ; + + trace_sdcard_ext_csd_bootmode(sd_uptime_ns(sd), clk_cycles, + clk_cycles > BOOT_MODE_DELAY_CYCLES_MIN); + if (clk_cycles > BOOT_MODE_DELAY_CYCLES_MIN) { + sd->ext_csd[EXT_CSD_PART_CONFIG] |= (1 << 3); + } + } + return sd_r3; } @@ -2162,6 +2198,8 @@ int sd_do_command(SDState *sd, SDRequest *req, return 0; } + ++sd->cmd_count; + if (sd->state == sd_inactive_state) { rtype = sd_illegal; goto send_response; diff --git a/hw/sd/trace-events b/hw/sd/trace-events index 43671dc791..5454e55077 100644 --- a/hw/sd/trace-events +++ b/hw/sd/trace-events @@ -57,6 +57,7 @@ sdcard_write_block(uint64_t addr, uint32_t len) "addr 0x%" PRIx64 " size 0x%x" sdcard_write_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t offset, uint8_t value) "%s %20s/ CMD%02d ofs %"PRIu32" value 0x%02x" sdcard_read_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t offset, uint64_t size, uint32_t blklen) "%s %20s/ CMD%02d ofs %"PRIu32" size %"PRIu64" blklen %" PRIu32 sdcard_set_voltage(uint16_t millivolts) "%u mV" +sdcard_ext_csd_bootmode(int64_t uptime_ns, int64_t clk_cycles, unsigned enabled) "%"PRId64" ns, %"PRId64" cycles, boot mode: %u" sdcard_ext_csd_update(unsigned index, uint8_t oval, uint8_t nval) "index %u: 0x%02x -> 0x%02x" sdcard_switch(unsigned access, unsigned index, unsigned value, unsigned set) "SWITCH acc:%u idx:%u val:%u set:%u"