From patchwork Fri Jun 28 07:02:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 808224 Delivered-To: patch@linaro.org Received: by 2002:adf:fe0a:0:b0:362:4979:7f74 with SMTP id n10csp225855wrr; Fri, 28 Jun 2024 00:17:08 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXnxjvNC2DUMGebZdqU39VNKMcejWbMSGCIg7FDvsAW5t8fuxqYzHUk/IN4Dd/wuXBDH7RKqAOxSK/e4GOToczU X-Google-Smtp-Source: AGHT+IEmvtAzFDkrIry+kK1eP6M8HBE3ya4Z9k1vhzUr3YJGUhwYzpTfqeJ12ViIWkIfWJQ3xuaV X-Received: by 2002:ad4:5aa7:0:b0:6af:7b2e:1868 with SMTP id 6a1803df08f44-6b5a544180emr13563376d6.18.1719559028184; Fri, 28 Jun 2024 00:17:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1719559028; cv=none; d=google.com; s=arc-20160816; b=ZNTV+JPdu2qGDS/12pWBBMmipDgekJKQREHjMjDCe75YesvXzbsNYAwfHcdihlT7Zo wq722T52TS90XSWr5B0np00Kn3E6ik/Ut0CA1DPAy80z1C8kpsp5zfrYqAlPM/w2v6lC JhJ6nHhywja0pob1nXZT7yIvNHNoSBLfNaQOE3i35PpxpN2ZuRvGptjVdrkKz3FhEPpF VSBvfU8YIhf7Pkmzo2kEZAfrIfFrJa/rDqyXEgA6IO5KkAPaYoy5U++A9DJA5fGunCc1 U3kFt/7cqR1qZZRFbRA+Gy0B/bqJ3PAvD5HnG1dgD5SLSeHts8ZNo76P8qWy1bURj/Lk yybw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=SnL/FPFYEQkll60HqwiRh6fnqmVJNFRbyEObo/B5eRw=; fh=Vqz0ILX7NeXJwCG5xiS+Wtk94IhOmAmLtOfN3kRbil4=; b=yguH4cqdiy6zdUTXVQRrlUqTrUfQY22P9blyhScbvAn/+tGQcB0g4zmKx/Xz1GnHB8 uzf6Ao3H+45M1NsZZLCjABRvnZnZyFedRo73R9jbfKOht17QBWL2U//nispCNAh137mg GNI0oATCT07GScrLTbMe8gZxDDcgAeU4TW5HIB/mYkKTLcJ+IhWSXMolLjsXSJrgISr4 p0bbeq2l+MipuqxJgx1ihv2A1Wkj+KhH8K7V9WnYmi95YG4SV0VITy4OEV0vAxPGck1C s/CJV+5Cd+oO5xJfwXlHN/agwTl+NMOJteshDaa4lQktWzPvS7u1iftPzB8jHn8FX4W7 pT/g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ujEncbw9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6b59e60b0fcsi13971146d6.511.2024.06.28.00.17.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 28 Jun 2024 00:17:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ujEncbw9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sN5lc-0003hD-EZ; Fri, 28 Jun 2024 03:11:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sN5lV-0003KN-Jz for qemu-devel@nongnu.org; Fri, 28 Jun 2024 03:11:26 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sN5lT-0004tJ-CF for qemu-devel@nongnu.org; Fri, 28 Jun 2024 03:11:25 -0400 Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-36733f09305so157204f8f.3 for ; Fri, 28 Jun 2024 00:11:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719558681; x=1720163481; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=SnL/FPFYEQkll60HqwiRh6fnqmVJNFRbyEObo/B5eRw=; b=ujEncbw9XmjkuHZ7xGVWWM6IaX6oL7YVGHu89ayP473fgitrueG2tYjTWiWgxl6YBo kUjXiuGvP3iNZyIWF4lPGwT5xIREnvrnr3rSgreJfRuwE6dghvSn3ZftXujfGlETeof2 dW1AMxnovWm0OsEmlq8ck2LSlS0+HvarSPSCZA5f+f02mjSELC6Zs6tjy+YmvI2ViQiO JJK7J109YVRWkf72P12vXGBt+gvZefkgO1QdZYtfxAU6POasDvccwsV/qYac+rf25+UE ce46ngnKk2dSDlNyNIdTsbroosLMbbLpWcjMLTMwzt+6yQ8F+2zUoBdBlKhvi/THiemU qWtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719558681; x=1720163481; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SnL/FPFYEQkll60HqwiRh6fnqmVJNFRbyEObo/B5eRw=; b=hhOF5rTJvAxeifH8GOb9+VyK1pNhKAyRsJbdta/rsws51Vsp0Ok36dNbvxJeYfgmTv t2Ejh6s1HA9RkkRYxVXGbE5cP1NtCXgEQ/1BG1k87OhG4yssiLH3iy1PtUTEXYr3h1ru qGOJiQVnuur6jBM9qiwjXWDD5PjK7RmgmnbA7xfxOTwPpICsaFvzIQ49m+gqczZA5cT9 fB7y2q2Ij0FgmR7GVuJ07ZVKKo5H2O7OLGQ82sCX2B5IUSBHd3pcdrbgFFf7tNX8tkHw oNwX+HSZTF/tLWtQ7Ub9d6dEVV6XSeA2IrpkPTAVucNTKcPH2l0R51ie4y/d3YEpHd5I /fyg== X-Gm-Message-State: AOJu0YzAcUWrXZMoz/tbzAtLeA3sQ0tSVMAFkB1npV2F7DHVty/OpLOl /QrLW26X1sI4a7HgxGbQl4/yd06KBPEkukGZPx930bcPu1ifwmAJz/EjPYw2mXDuxiZCcoenpvb I2sw= X-Received: by 2002:a05:6000:154d:b0:366:e7b5:3b49 with SMTP id ffacd0b85a97d-366e7b540a8mr15072878f8f.54.1719558681726; Fri, 28 Jun 2024 00:11:21 -0700 (PDT) Received: from m1x-phil.lan (cho94-h02-176-184-4-239.dsl.sta.abo.bbox.fr. [176.184.4.239]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3675a0cd6e5sm1352576f8f.4.2024.06.28.00.11.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 28 Jun 2024 00:11:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PATCH v42 94/98] hw/sd/sdcard: add emmc_cmd_SEND_TUNING_BLOCK handler (CMD21) Date: Fri, 28 Jun 2024 09:02:10 +0200 Message-ID: <20240628070216.92609-95-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240628070216.92609-1-philmd@linaro.org> References: <20240628070216.92609-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Sai Pavan Boddu MMC cards support different tuning sequence for entering HS200 mode. Signed-off-by: Sai Pavan Boddu Signed-off-by: Edgar E. Iglesias Signed-off-by: Cédric Le Goater Signed-off-by: Cédric Le Goater Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/sdmmc-internal.h | 3 +++ hw/sd/sd.c | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/hw/sd/sdmmc-internal.h b/hw/sd/sdmmc-internal.h index 20d85aea6d..a2769a80aa 100644 --- a/hw/sd/sdmmc-internal.h +++ b/hw/sd/sdmmc-internal.h @@ -108,4 +108,7 @@ #define EXT_CSD_PART_CONFIG_EN_BOOT0 (0x1 << 3) #define EXT_CSD_PART_CONFIG_EN_USER (0x7 << 3) +#define EXT_CSD_BUS_WIDTH_8_MASK 0x4 +#define EXT_CSD_BUS_WIDTH_4_MASK 0x2 + #endif diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 0561079eff..ae5e73175e 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -698,6 +698,25 @@ static const uint8_t sd_tuning_block_pattern4[64] = { 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde }; +static const uint8_t mmc_tuning_block_pattern8[128] = { + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee +}; + static int sd_req_crc_validate(SDRequest *req) { uint8_t buffer[5]; @@ -1603,6 +1622,26 @@ static sd_rsp_type_t sd_cmd_SEND_TUNING_BLOCK(SDState *sd, SDRequest req) sizeof(sd_tuning_block_pattern4)); } +/* CMD21 */ +static sd_rsp_type_t emmc_cmd_SEND_TUNING_BLOCK(SDState *sd, SDRequest req) +{ + const uint8_t *buf; + size_t size; + + if (sd->state != sd_transfer_state) { + sd_invalid_state_for_cmd(sd, req); + } + + if (sd->ext_csd[EXT_CSD_BUS_WIDTH] & EXT_CSD_BUS_WIDTH_8_MASK) { + buf = mmc_tuning_block_pattern8; + size = sizeof(mmc_tuning_block_pattern8); + } else { + buf = sd_tuning_block_pattern4; + size = sizeof(sd_tuning_block_pattern4); + } + return sd_cmd_to_sendingdata(sd, req, 0, buf, size); +} + /* CMD23 */ static sd_rsp_type_t sd_cmd_SET_BLOCK_COUNT(SDState *sd, SDRequest req) { @@ -2391,6 +2430,7 @@ uint8_t sd_read_byte(SDState *sd) case 13: /* ACMD13: SD_STATUS */ case 17: /* CMD17: READ_SINGLE_BLOCK */ case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */ + case 21: /* CMD21: SEND_TUNING_BLOCK (MMC) */ case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */ case 30: /* CMD30: SEND_WRITE_PROT */ case 51: /* ACMD51: SEND_SCR */ @@ -2573,6 +2613,7 @@ static const SDProto sd_proto_emmc = { [16] = {2, sd_ac, "SET_BLOCKLEN", sd_cmd_SET_BLOCKLEN}, [17] = {2, sd_adtc, "READ_SINGLE_BLOCK", sd_cmd_READ_SINGLE_BLOCK}, [19] = {0, sd_adtc, "BUSTEST_W", sd_cmd_unimplemented}, + [21] = {2, sd_adtc, "SEND_TUNING_BLOCK", emmc_cmd_SEND_TUNING_BLOCK}, [23] = {2, sd_ac, "SET_BLOCK_COUNT", sd_cmd_SET_BLOCK_COUNT}, [24] = {4, sd_adtc, "WRITE_SINGLE_BLOCK", sd_cmd_WRITE_SINGLE_BLOCK}, [26] = {4, sd_adtc, "PROGRAM_CID", mmc_cmd_PROGRAM_CID},