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[176.184.4.239]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3675a0cd4a1sm1345327f8f.23.2024.06.28.00.10.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 28 Jun 2024 00:11:00 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [RFC PATCH v42 90/98] hw/sd/sdcard: Add experimental 'x-aspeed-emmc-kludge' property Date: Fri, 28 Jun 2024 09:02:06 +0200 Message-ID: <20240628070216.92609-91-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240628070216.92609-1-philmd@linaro.org> References: <20240628070216.92609-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When booting U-boot/Linux on Aspeed boards via eMMC, some commands don't behave as expected from the spec. Add the 'x-aspeed-emmc-kludge' property to allow non standard uses until we figure out the reasons. Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/sd.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index bd77853419..dc692fe1fa 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -127,6 +127,7 @@ struct SDState { uint8_t spec_version; BlockBackend *blk; + bool aspeed_emmc_kludge; const SDProto *proto; @@ -2567,6 +2568,8 @@ static Property sd_properties[] = { DEFINE_PROP_UINT8("spec_version", SDState, spec_version, SD_PHY_SPECv3_01_VERS), DEFINE_PROP_DRIVE("drive", SDState, blk), + DEFINE_PROP_BOOL("x-aspeed-emmc-kludge", SDState, + aspeed_emmc_kludge, false), /* We do not model the chip select pin, so allow the board to select * whether card should be in SSI or MMC/SD mode. It is also up to the * board to ensure that ssi transfers only occur when the chip select