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[209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6ae4a733c39si23082776d6.68.2024.06.04.02.58.33 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 04 Jun 2024 02:58:33 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GFdAoyoy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEQvE-0008IN-Ti; Tue, 04 Jun 2024 05:57:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEQvB-00088O-GA for qemu-devel@nongnu.org; Tue, 04 Jun 2024 05:57:37 -0400 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sEQv9-00029I-HA for qemu-devel@nongnu.org; Tue, 04 Jun 2024 05:57:37 -0400 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-42134bb9735so29701175e9.1 for ; Tue, 04 Jun 2024 02:57:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717495053; x=1718099853; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=obtEpkiAsJdiWpm7zcpgW5liQ303qrBraj3NKulpnrg=; b=GFdAoyoylMNQ+DPpBG7JKcNmY3lHNdn28Djst9t6qFiZvtlDq31TMKz84dv9aFqDq6 EkTHHe7N0V5xddDaXzbgGhi0tyAwuQZ8gYBpyRv8WainUeecqXVHjVF6Vn3HUP9qLYdn MsiIzhNs4Ne7LU5ELTKVD1Hu0Ku0zA6frSEnheHXUpbFLecd/EqUrUJLrmZkqdsljJ5l YMgZSEYiQqhWFYyvWXCeGvT9qatJR99xiILgtFai8tmdHPMVFb+Gh1Zt7K7zNTrYWXEq 3paZgbVMp5Ue7O6VnUo7SCAC7CKbcGQMAn1jmjOr2k/vuMflCSgOif4oCqNSbtBUPA5Q zXXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717495053; x=1718099853; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=obtEpkiAsJdiWpm7zcpgW5liQ303qrBraj3NKulpnrg=; b=du6/2Yjre1hPNqDpiTPTjmAMHObpxj5wERncHAll42XxdCAPcAXePjTJqAgRRbgMo5 ICQqc4NZg1fXx5Q/dSqoui276GzNYx31ABdqX+PV3Ae50t2ONSt+wkhmyrGTuNolFuwj bmTS+90FbOGgRGev4Gni/YGQFoJETqaGrI9AVy5lxxSf0a7tWlqMOSfbgvnrby1uQs7R hd0PII4EW1241qdlMlSPTw1fAtqGc0GWr7h0+uaNIVbIS88Lvy419+eQG38FyL6+P0pk 6EjvGmHybxaf7g9j5yohqJ1r2Q9jIh6jziIox9BiISxp8qbfAygvQ6dmx1aCcTqHiFB3 byeQ== X-Gm-Message-State: AOJu0YzcuosbtAe1CuyZ14j/NXJahjS2aAL0R/ekqhPg+J9IvDarmBBP WZP7JR4Z1Ee/7GObJQUAf6YjUNAXX8ysIWyHfFjcOmZC+Q1hQdwq+ZyEPZANn0Gmc242+BnQnW7 + X-Received: by 2002:a05:600c:4e8b:b0:421:3a41:5428 with SMTP id 5b1f17b1804b1-4213a4157bcmr44589875e9.41.1717495053637; Tue, 04 Jun 2024 02:57:33 -0700 (PDT) Received: from m1x-phil.lan ([176.176.159.34]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4215447035bsm7234385e9.13.2024.06.04.02.57.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Jun 2024 02:57:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PULL 15/32] hw/core: expand on the alignment of CPUState Date: Tue, 4 Jun 2024 11:55:51 +0200 Message-ID: <20240604095609.12285-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240604095609.12285-1-philmd@linaro.org> References: <20240604095609.12285-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Alex Bennée Make the relationship between CPUState, ArchCPU and cpu_env a bit clearer in the kdoc comments. Signed-off-by: Alex Bennée Reviewed-by: Pierrick Bouvier Message-ID: <20240530194250.1801701-2-alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index bb398e8237..be44746d24 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -391,7 +391,8 @@ struct qemu_work_item; #define CPU_UNSET_NUMA_NODE_ID -1 /** - * CPUState: + * struct CPUState - common state of one CPU core or thread. + * * @cpu_index: CPU index (informative). * @cluster_index: Identifies which cluster this CPU is in. * For boards which don't define clusters or for "loose" CPUs not assigned @@ -439,10 +440,15 @@ struct qemu_work_item; * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU * dirty ring structure. * - * State of one CPU core or thread. + * @neg_align: The CPUState is the common part of a concrete ArchCPU + * which is allocated when an individual CPU instance is created. As + * such care is taken is ensure there is no gap between between + * CPUState and CPUArchState within ArchCPU. * - * Align, in order to match possible alignment required by CPUArchState, - * and eliminate a hole between CPUState and CPUArchState within ArchCPU. + * @neg: The architectural register state ("cpu_env") immediately follows + * CPUState in ArchCPU and is passed to TCG code. The @neg structure holds + * some common TCG CPU variables which are accessed with a negative offset + * from cpu_env. */ struct CPUState { /*< private >*/