From patchwork Mon May 27 00:49:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 799188 Delivered-To: patch@linaro.org Received: by 2002:a5d:6a47:0:b0:354:fb4b:99cd with SMTP id t7csp1657953wrw; Sun, 26 May 2024 17:52:08 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVke4zFrZXwPoB22lTWezKRYgmFGX3tv5lnjES9/ZXzqdZzecfwB9xobG0eLPFuNFSkmivU9qs7QftnzJ341/hb X-Google-Smtp-Source: AGHT+IHXafbcm2CAoxnmp6h5Rl/ojR/AsyRgnYZ3hBtJajvOfGhsDkuiyw1isVhv1mp6qceHbVwr X-Received: by 2002:ae9:f706:0:b0:792:966d:a44c with SMTP id af79cd13be357-794ab080ac4mr775644085a.26.1716771127807; Sun, 26 May 2024 17:52:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716771127; cv=none; d=google.com; s=arc-20160816; b=NuNyIZ7M8TFfegFbPBBdC0LgrWqtM8jg73a80oU/HSq8+xU3xORCjpYLppGeNb6UlF +Ud3maomGDqx2odUcswBHF9s0VIwkovUIRvxv8njnt4rrjH3133KwYvuI+v7Xi2V5G+4 Jtj+4M6zjL3mvjtMBg+0BldjK6qhMJliVU2LWDq747fjXY2kKCxcP/eQo6nnp7Ta/BmQ FFH7ZxhY1cimDzQMQZ611oRT5Nib53w+7VomTOjiQl9ugSRZOyZe/APxkAVqPPYBIfmC eKdcLZeZ3YE+noP51NZUTzN8b8qB1IYCPjawByGqeXFeHg43q8hHLWhTGhGDElJ90n8u HTYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=YlnBqdWRAdGOIDkFc78uZlpVYy9Rupt5PRiXjMOq17M=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=laDJXcq+XU4j2ISxaXaAXOU/p+P/M1QGQ+ctsVhEZLa+kMg+WWoi/FFuBgnrS+wxDb K7DqT0CQcE4i/GHmnmJRRivD+SS8ILn3cV1YzAhD6j9ZnF2ahVZUwFNSZ7rt+zbRLHCS A+EbXn7ntVUbVi0y7ArH/BbnmXnXx7uxp486JXWCRvX1Y5Lev/x9KbeEm12k8bERgzk2 /zdefijfHd/4TS9YXeJW62dG7n7CuX/4OrkBRbT+IXIDUWicwGPNJ8BYsVEUcl+J/kP1 Omq8svkChdpRphcMGSCbpwHkgB4rMxpj3jLuEthr3i/Yfp0Yl5yTBwED1F/GXcC4hW/h ZDcw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dNg0VyPq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-794abd0a858si680756685a.322.2024.05.26.17.52.07 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 26 May 2024 17:52:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dNg0VyPq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sBOZL-0007FR-4I; Sun, 26 May 2024 20:50:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sBOZ0-00072Z-Rk for qemu-devel@nongnu.org; Sun, 26 May 2024 20:50:12 -0400 Received: from mail-pf1-x435.google.com ([2607:f8b0:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sBOYv-0003Zi-Sz for qemu-devel@nongnu.org; Sun, 26 May 2024 20:50:07 -0400 Received: by mail-pf1-x435.google.com with SMTP id d2e1a72fcca58-6f8e98784b3so2008490b3a.1 for ; Sun, 26 May 2024 17:50:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1716771004; x=1717375804; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=YlnBqdWRAdGOIDkFc78uZlpVYy9Rupt5PRiXjMOq17M=; b=dNg0VyPqXSLNPkLaw0E7uZYfLStxCZKuBiFsLByFjGQOmou4+cRpmiGpjrpS38MwAg xo+7BO9nw+q+3xQ+BgaN4uBKvd7dJ6/nui95E4X1V6Z/EYRPHwBHO0cgSVqNxOvdEWrs bXtMc9XFPlLTzPUlczjGVXDx0RgELLYEFGPMrH9XFFABxZ84cVlI3aFgTdz7kJ8av29B XTZd05y3hpI9Gxd3QZFqhDFkdA5GJi3ELth75LkIB/Sx+9pEpPAlf1e9rm8pC5cNp+RF 8lrUn0z7sno87qQv5soKUOyfR51rZB342GPGrkwdI0T+0ABveUGy0PZzvo7HEdUhDCRW eKag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1716771004; x=1717375804; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YlnBqdWRAdGOIDkFc78uZlpVYy9Rupt5PRiXjMOq17M=; b=IMdCWwqC+xUvYGFQ5aXA76NOovkHM3+G+6fKEBsked8Mjzfi4nPbRSovmp1g9HS7XN rxrI44mMI3rs3OKyXrxVSxmYx72iuuIfQiDkkwW7smH7sHz/HC4yOilBhWLVoIgnwlfh SNqyoyflSTj9Ot0YO+j7De3DbDpeTUB/n6lnfhVBWG9U0mR8Mk6SaXh1bLllFEmC/U9K 3Hej6k3xjg8JKdfo5y+oe+JpD6mmIBTtCzawPxTLF72Vb1jUlLbN0a64AbcM8sZhLh9r U4LuWi1o5L2oPN+tCnolwpi4qLVTgUcfWW5iI1VY0gqgIqIEdZ2TV+ybBdVk/sIFs2ZN yNpw== X-Gm-Message-State: AOJu0YwqiGrB+vKrGKyYHglQaJq2nuIFt2qqD7VUb9vCppbMHAjrZxOt A5qfKJ47Tefd1lxdl6CX6TbQoKIlhNC27NCC/p+XsROO1K0j7dobNaMXGBMoh1ip4Cs0S1iaG2T e X-Received: by 2002:a05:6a00:908f:b0:6f4:d07a:e7f0 with SMTP id d2e1a72fcca58-6f8f3d784b0mr9348950b3a.27.1716771004039; Sun, 26 May 2024 17:50:04 -0700 (PDT) Received: from stoup.. (174-21-72-5.tukw.qwest.net. [174.21.72.5]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-6f8fd6d7598sm3942958b3a.220.2024.05.26.17.50.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 May 2024 17:50:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 02/28] target/i386: Convert do_fldt, do_fstt to X86Access Date: Sun, 26 May 2024 17:49:35 -0700 Message-Id: <20240527005001.642825-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240527005001.642825-1-richard.henderson@linaro.org> References: <20240527005001.642825-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 44 +++++++++++++++++++++++++----------- 1 file changed, 31 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index ece22a3553..1662643a8f 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -27,6 +27,7 @@ #include "fpu/softfloat.h" #include "fpu/softfloat-macros.h" #include "helper-tcg.h" +#include "access.h" /* float macros */ #define FT0 (env->ft0) @@ -84,23 +85,22 @@ static inline void fpop(CPUX86State *env) env->fpstt = (env->fpstt + 1) & 7; } -static floatx80 do_fldt(CPUX86State *env, target_ulong ptr, uintptr_t retaddr) +static floatx80 do_fldt(X86Access *ac, target_ulong ptr) { CPU_LDoubleU temp; - temp.l.lower = cpu_ldq_data_ra(env, ptr, retaddr); - temp.l.upper = cpu_lduw_data_ra(env, ptr + 8, retaddr); + temp.l.lower = access_ldq(ac, ptr); + temp.l.upper = access_ldw(ac, ptr + 8); return temp.d; } -static void do_fstt(CPUX86State *env, floatx80 f, target_ulong ptr, - uintptr_t retaddr) +static void do_fstt(X86Access *ac, target_ulong ptr, floatx80 f) { CPU_LDoubleU temp; temp.d = f; - cpu_stq_data_ra(env, ptr, temp.l.lower, retaddr); - cpu_stw_data_ra(env, ptr + 8, temp.l.upper, retaddr); + access_stq(ac, ptr, temp.l.lower); + access_stw(ac, ptr + 8, temp.l.upper); } /* x87 FPU helpers */ @@ -382,16 +382,22 @@ int64_t helper_fisttll_ST0(CPUX86State *env) void helper_fldt_ST0(CPUX86State *env, target_ulong ptr) { int new_fpstt; + X86Access ac; + + access_prepare(&ac, env, ptr, 10, MMU_DATA_LOAD, GETPC()); new_fpstt = (env->fpstt - 1) & 7; - env->fpregs[new_fpstt].d = do_fldt(env, ptr, GETPC()); + env->fpregs[new_fpstt].d = do_fldt(&ac, ptr); env->fpstt = new_fpstt; env->fptags[new_fpstt] = 0; /* validate stack entry */ } void helper_fstt_ST0(CPUX86State *env, target_ulong ptr) { - do_fstt(env, ST0, ptr, GETPC()); + X86Access ac; + + access_prepare(&ac, env, ptr, 10, MMU_DATA_STORE, GETPC()); + do_fstt(&ac, ptr, ST0); } void helper_fpush(CPUX86State *env) @@ -2460,15 +2466,18 @@ void helper_fldenv(CPUX86State *env, target_ulong ptr, int data32) static void do_fsave(CPUX86State *env, target_ulong ptr, int data32, uintptr_t retaddr) { + X86Access ac; floatx80 tmp; int i; do_fstenv(env, ptr, data32, retaddr); ptr += (target_ulong)14 << data32; + access_prepare(&ac, env, ptr, 80, MMU_DATA_STORE, retaddr); + for (i = 0; i < 8; i++) { tmp = ST(i); - do_fstt(env, tmp, ptr, retaddr); + do_fstt(&ac, ptr, tmp); ptr += 10; } @@ -2483,14 +2492,17 @@ void helper_fsave(CPUX86State *env, target_ulong ptr, int data32) static void do_frstor(CPUX86State *env, target_ulong ptr, int data32, uintptr_t retaddr) { + X86Access ac; floatx80 tmp; int i; do_fldenv(env, ptr, data32, retaddr); ptr += (target_ulong)14 << data32; + access_prepare(&ac, env, ptr, 80, MMU_DATA_LOAD, retaddr); + for (i = 0; i < 8; i++) { - tmp = do_fldt(env, ptr, retaddr); + tmp = do_fldt(&ac, ptr); ST(i) = tmp; ptr += 10; } @@ -2507,6 +2519,7 @@ static void do_xsave_fpu(CPUX86State *env, target_ulong ptr, uintptr_t ra) { int fpus, fptag, i; target_ulong addr; + X86Access ac; fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; fptag = 0; @@ -2525,9 +2538,11 @@ static void do_xsave_fpu(CPUX86State *env, target_ulong ptr, uintptr_t ra) cpu_stq_data_ra(env, ptr + XO(legacy.fpdp), 0, ra); /* edp+sel; rdp */ addr = ptr + XO(legacy.fpregs); + access_prepare(&ac, env, addr, 8 * 16, MMU_DATA_STORE, ra); + for (i = 0; i < 8; i++) { floatx80 tmp = ST(i); - do_fstt(env, tmp, addr, ra); + do_fstt(&ac, addr, tmp); addr += 16; } } @@ -2700,6 +2715,7 @@ static void do_xrstor_fpu(CPUX86State *env, target_ulong ptr, uintptr_t ra) { int i, fpuc, fpus, fptag; target_ulong addr; + X86Access ac; fpuc = cpu_lduw_data_ra(env, ptr + XO(legacy.fcw), ra); fpus = cpu_lduw_data_ra(env, ptr + XO(legacy.fsw), ra); @@ -2712,8 +2728,10 @@ static void do_xrstor_fpu(CPUX86State *env, target_ulong ptr, uintptr_t ra) } addr = ptr + XO(legacy.fpregs); + access_prepare(&ac, env, addr, 8 * 16, MMU_DATA_LOAD, ra); + for (i = 0; i < 8; i++) { - floatx80 tmp = do_fldt(env, addr, ra); + floatx80 tmp = do_fldt(&ac, addr); ST(i) = tmp; addr += 16; }