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([149.14.240.163]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fccee9292sm222611855e9.37.2024.05.15.00.52.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 May 2024 00:52:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 06/34] accel/tcg: Record mmio bytes during translation Date: Wed, 15 May 2024 09:52:19 +0200 Message-Id: <20240515075247.68024-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240515075247.68024-1-richard.henderson@linaro.org> References: <20240515075247.68024-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This will be able to replace plugin_insn_append, and will be usable for disassembly. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/exec/translator.h | 12 ++++++++++++ accel/tcg/translator.c | 41 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/include/exec/translator.h b/include/exec/translator.h index 348985c3a3..4a86907ecc 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -90,6 +90,18 @@ typedef struct DisasContextBase { bool plugin_enabled; struct TCGOp *insn_start; void *host_addr[2]; + + /* + * Record insn data that we cannot read directly from host memory. + * There are only two reasons we cannot use host memory: + * (1) We are executing from I/O, + * (2) We are executing a synthetic instruction (s390x EX). + * In both cases we need record exactly one instruction, + * and thus the maximum amount of data we record is limited. + */ + int record_start; + int record_len; + uint8_t record[32]; } DisasContextBase; /** diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 18138c61e1..86a1fe17a0 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -132,6 +132,8 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, db->insn_start = NULL; db->host_addr[0] = host_pc; db->host_addr[1] = NULL; + db->record_start = 0; + db->record_len = 0; ops->init_disas_context(db, cpu); tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ @@ -318,6 +320,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db, return true; } +static void record_save(DisasContextBase *db, vaddr pc, + const void *from, int size) +{ + int offset; + + /* Do not record probes before the start of TB. */ + if (pc < db->pc_first) { + return; + } + + /* + * In translator_access, we verified that pc is within 2 pages + * of pc_first, thus this will never overflow. + */ + offset = pc - db->pc_first; + + /* + * Either the first or second page may be I/O. If it is the second, + * then the first byte we need to record will be at a non-zero offset. + * In either case, we should not need to record but a single insn. + */ + if (db->record_len == 0) { + db->record_start = offset; + db->record_len = size; + } else { + assert(offset == db->record_start + db->record_len); + assert(db->record_len + size <= sizeof(db->record)); + db->record_len += size; + } + + memcpy(db->record + (offset - db->record_start), from, size); +} + static void plugin_insn_append(vaddr pc, const void *from, size_t size) { #ifdef CONFIG_PLUGIN @@ -345,6 +380,7 @@ uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc) if (!translator_ld(env, db, &raw, pc, sizeof(raw))) { raw = cpu_ldub_code(env, pc); + record_save(db, pc, &raw, sizeof(raw)); } plugin_insn_append(pc, &raw, sizeof(raw)); return raw; @@ -359,6 +395,7 @@ uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) } else { tgt = cpu_lduw_code(env, pc); raw = tswap16(tgt); + record_save(db, pc, &raw, sizeof(raw)); } plugin_insn_append(pc, &raw, sizeof(raw)); return tgt; @@ -373,6 +410,7 @@ uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) } else { tgt = cpu_ldl_code(env, pc); raw = tswap32(tgt); + record_save(db, pc, &raw, sizeof(raw)); } plugin_insn_append(pc, &raw, sizeof(raw)); return tgt; @@ -387,6 +425,7 @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) } else { tgt = cpu_ldq_code(env, pc); raw = tswap64(tgt); + record_save(db, pc, &raw, sizeof(raw)); } plugin_insn_append(pc, &raw, sizeof(raw)); return tgt; @@ -394,5 +433,7 @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8) { + assert(pc >= db->pc_first); + record_save(db, pc, &insn8, sizeof(insn8)); plugin_insn_append(pc, &insn8, sizeof(insn8)); }