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([149.14.240.163]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fccee9292sm222611855e9.37.2024.05.15.00.52.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 May 2024 00:52:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 03/34] accel/tcg: Pass DisasContextBase to translator_fake_ldb Date: Wed, 15 May 2024 09:52:16 +0200 Message-Id: <20240515075247.68024-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240515075247.68024-1-richard.henderson@linaro.org> References: <20240515075247.68024-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/exec/translator.h | 5 +++-- accel/tcg/translator.c | 2 +- target/s390x/tcg/translate.c | 2 +- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index 212362f5a0..348985c3a3 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -222,15 +222,16 @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db, /** * translator_fake_ldb - fake instruction load - * @insn8: byte of instruction + * @db: Disassembly context * @pc: program counter of instruction + * @insn8: byte of instruction * * This is a special case helper used where the instruction we are * about to translate comes from somewhere else (e.g. being * re-synthesised for s390x "ex"). It ensures we update other areas of * the translator with details of the executed instruction. */ -void translator_fake_ldb(uint8_t insn8, vaddr pc); +void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8); #ifdef COMPILING_PER_TARGET /* diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 53225290b1..3456455fa5 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -375,7 +375,7 @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) return ret; } -void translator_fake_ldb(uint8_t insn8, vaddr pc) +void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8) { plugin_insn_append(pc, &insn8, sizeof(insn8)); } diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 90a74ee795..6d7f6e7064 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -6203,7 +6203,7 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s) /* Register insn bytes with translator so plugins work. */ for (int i = 0; i < ilen; i++) { uint8_t byte = extract64(insn, 56 - (i * 8), 8); - translator_fake_ldb(byte, pc + i); + translator_fake_ldb(&s->base, pc + i, byte); } op = insn >> 56; } else {