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([195.76.196.165]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3502bbbbf20sm6764797f8f.93.2024.05.11.04.54.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 May 2024 04:54:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org Subject: [PATCH 10/17] aarch64: Tidy reginfo dumping ahead of ZA state Date: Sat, 11 May 2024 13:53:53 +0200 Message-Id: <20240511115400.7587-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511115400.7587-1-richard.henderson@linaro.org> References: <20240511115400.7587-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::235; envelope-from=richard.henderson@linaro.org; helo=mail-lj1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org A misalignment for sve_vl, plus add a bit more space on the left for the ZA[n] field name. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- risu_reginfo_aarch64.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index 0161044..86e70ab 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -183,6 +183,18 @@ static int sve_preg_is_eq(int vq, const void *p1, const void *p2) return memcmp(p1, p2, vq * 2) == 0; } +static void sve_dump_zreg(FILE *f, int vq, const uint64_t *z) +{ + const char *pad = ""; + int q; + + for (q = 0; q < vq; q++) { + fprintf(f, "%s[%-2d] %016" PRIx64 "%016" PRIx64 "\n", + pad, q, z[2 * q + 1], z[2 * q]); + pad = " "; /* 11 spaces */ + } +} + static void sve_dump_preg(FILE *f, int vq, const uint16_t *p) { int q; @@ -211,10 +223,10 @@ static void sve_dump_zreg_diff(FILE *f, int vq, const uint64_t *za, uint64_t zb0 = zb[2 * q], zb1 = zb[2 * q + 1]; if (za0 != zb0 || za1 != zb1) { - fprintf(f, "%sq%-2d: %016" PRIx64 "%016" PRIx64 + fprintf(f, "%s[%-2d]: %016" PRIx64 "%016" PRIx64 " vs %016" PRIx64 "%016" PRIx64"\n", pad, q, za1, za0, zb1, zb0); - pad = " "; + pad = " "; /* 11 spaces */ } } } @@ -237,19 +249,14 @@ void reginfo_dump(struct reginfo *ri, FILE * f) if (ri->sve_vl) { int vq = sve_vq_from_vl(ri->sve_vl); - int q; fprintf(f, " vl : %d\n", ri->sve_vl); for (i = 0; i < SVE_NUM_ZREGS; i++) { uint64_t *z = reginfo_zreg(ri, vq, i); - fprintf(f, " Z%-2d q%-2d: %016" PRIx64 "%016" PRIx64 "\n", - i, 0, z[1], z[0]); - for (q = 1; q < vq; ++q) { - fprintf(f, " q%-2d: %016" PRIx64 "%016" PRIx64 "\n", - q, z[q * 2 + 1], z[q * 2]); - } + fprintf(f, " Z%-2d : ", i); + sve_dump_zreg(f, vq, z); } for (i = 0; i < SVE_NUM_PREGS + 1; i++) { @@ -312,7 +319,7 @@ void reginfo_dump_mismatch(struct reginfo *m, struct reginfo *a, FILE * f) } if (m->sve_vl != a->sve_vl) { - fprintf(f, " vl : %d vs %d\n", m->sve_vl, a->sve_vl); + fprintf(f, " vl : %d vs %d\n", m->sve_vl, a->sve_vl); } if (m->sve_vl) { @@ -323,7 +330,7 @@ void reginfo_dump_mismatch(struct reginfo *m, struct reginfo *a, FILE * f) uint64_t *za = reginfo_zreg(a, vq, i); if (!sve_zreg_is_eq(vq, zm, za)) { - fprintf(f, " Z%-2d ", i); + fprintf(f, " Z%-2d : ", i); sve_dump_zreg_diff(f, vq, zm, za); } }