| Message ID | 20240424233131.988727-30-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | accel/tcg: Improve disassembly for target and plugin | expand |
Cc'ing qemu-riscv@ On 25/4/24 01:31, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/riscv/translate.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target/riscv/translate.c b/target/riscv/translate.c > index c999e942e1..2c27fd4ce1 100644 > --- a/target/riscv/translate.c > +++ b/target/riscv/translate.c > @@ -20,7 +20,6 @@ > #include "qemu/log.h" > #include "cpu.h" > #include "tcg/tcg-op.h" > -#include "exec/cpu_ldst.h" > #include "exec/exec-all.h" > #include "exec/helper-proto.h" > #include "exec/helper-gen.h" > @@ -1082,7 +1081,7 @@ static uint32_t opcode_at(DisasContextBase *dcbase, target_ulong pc) > CPUState *cpu = ctx->cs; > CPURISCVState *env = cpu_env(cpu); > > - return cpu_ldl_code(env, pc); > + return translator_ldl(env, &ctx->base, pc); > } > > /* Include insn module translation function */ > @@ -1243,7 +1242,8 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) > unsigned page_ofs = ctx->base.pc_next & ~TARGET_PAGE_MASK; > > if (page_ofs > TARGET_PAGE_SIZE - MAX_INSN_LEN) { > - uint16_t next_insn = cpu_lduw_code(env, ctx->base.pc_next); > + uint16_t next_insn = > + translator_lduw(env, &ctx->base, ctx->base.pc_next); > int len = insn_len(next_insn); > > if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
On 25/4/24 01:31, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/riscv/translate.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On Thu, Apr 25, 2024 at 9:36 AM Richard Henderson <richard.henderson@linaro.org> wrote: > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/translate.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target/riscv/translate.c b/target/riscv/translate.c > index c999e942e1..2c27fd4ce1 100644 > --- a/target/riscv/translate.c > +++ b/target/riscv/translate.c > @@ -20,7 +20,6 @@ > #include "qemu/log.h" > #include "cpu.h" > #include "tcg/tcg-op.h" > -#include "exec/cpu_ldst.h" > #include "exec/exec-all.h" > #include "exec/helper-proto.h" > #include "exec/helper-gen.h" > @@ -1082,7 +1081,7 @@ static uint32_t opcode_at(DisasContextBase *dcbase, target_ulong pc) > CPUState *cpu = ctx->cs; > CPURISCVState *env = cpu_env(cpu); > > - return cpu_ldl_code(env, pc); > + return translator_ldl(env, &ctx->base, pc); > } > > /* Include insn module translation function */ > @@ -1243,7 +1242,8 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) > unsigned page_ofs = ctx->base.pc_next & ~TARGET_PAGE_MASK; > > if (page_ofs > TARGET_PAGE_SIZE - MAX_INSN_LEN) { > - uint16_t next_insn = cpu_lduw_code(env, ctx->base.pc_next); > + uint16_t next_insn = > + translator_lduw(env, &ctx->base, ctx->base.pc_next); > int len = insn_len(next_insn); > > if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) { > -- > 2.34.1 > >
diff --git a/target/riscv/translate.c b/target/riscv/translate.c index c999e942e1..2c27fd4ce1 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -20,7 +20,6 @@ #include "qemu/log.h" #include "cpu.h" #include "tcg/tcg-op.h" -#include "exec/cpu_ldst.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" @@ -1082,7 +1081,7 @@ static uint32_t opcode_at(DisasContextBase *dcbase, target_ulong pc) CPUState *cpu = ctx->cs; CPURISCVState *env = cpu_env(cpu); - return cpu_ldl_code(env, pc); + return translator_ldl(env, &ctx->base, pc); } /* Include insn module translation function */ @@ -1243,7 +1242,8 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) unsigned page_ofs = ctx->base.pc_next & ~TARGET_PAGE_MASK; if (page_ofs > TARGET_PAGE_SIZE - MAX_INSN_LEN) { - uint16_t next_insn = cpu_lduw_code(env, ctx->base.pc_next); + uint16_t next_insn = + translator_lduw(env, &ctx->base, ctx->base.pc_next); int len = insn_len(next_insn); if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/riscv/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)