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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id l1-20020a170902f68100b001e3e244e5c0sm8694439plg.78.2024.04.15.21.06.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 21:06:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org Subject: [PATCH 2/7] accel/tcg: Set CPUState.plugin_ra before all plugin callbacks Date: Mon, 15 Apr 2024 21:06:04 -0700 Message-Id: <20240416040609.1313605-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240416040609.1313605-1-richard.henderson@linaro.org> References: <20240416040609.1313605-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/hw/core/cpu.h | 1 + accel/tcg/plugin-gen.c | 50 +++++++++++++++++++++++++++++++++++++----- 2 files changed, 46 insertions(+), 5 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 10cd492aff..f4af37c13d 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -350,6 +350,7 @@ typedef union IcountDecr { typedef struct CPUNegativeOffsetState { CPUTLB tlb; #ifdef CONFIG_PLUGIN + uintptr_t plugin_ra; GArray *plugin_mem_cbs; #endif IcountDecr icount_decr; diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 36e9134a5d..f96b49cce6 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -37,6 +37,12 @@ enum plugin_gen_from { PLUGIN_GEN_AFTER_TB, }; +enum plugin_gen_ra { + GEN_RA_DONE, + GEN_RA_FROM_TB, + GEN_RA_FROM_INSN, +}; + /* called before finishing a TB with exit_tb, goto_tb or goto_ptr */ void plugin_gen_disable_mem_helpers(void) { @@ -151,11 +157,38 @@ static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, tcg_temp_free_i32(cpu_index); } -static void inject_cb(struct qemu_plugin_dyn_cb *cb) +static void inject_ra(enum plugin_gen_ra *gen_ra) +{ + TCGv_ptr ra; + + switch (*gen_ra) { + case GEN_RA_DONE: + return; + case GEN_RA_FROM_TB: + ra = tcg_constant_ptr(NULL); + break; + case GEN_RA_FROM_INSN: + ra = tcg_temp_ebb_new_ptr(); + tcg_gen_plugin_pc(ra); + break; + default: + g_assert_not_reached(); + } + + tcg_gen_st_ptr(ra, tcg_env, + offsetof(CPUState, neg.plugin_ra) - + offsetof(ArchCPU, env)); + tcg_temp_free_ptr(ra); + *gen_ra = GEN_RA_DONE; +} + +static void inject_cb(struct qemu_plugin_dyn_cb *cb, + enum plugin_gen_ra *gen_ra) { switch (cb->type) { case PLUGIN_CB_REGULAR: + inject_ra(gen_ra); gen_udata_cb(cb); break; case PLUGIN_CB_INLINE: @@ -167,16 +200,18 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) } static void inject_mem_cb(struct qemu_plugin_dyn_cb *cb, + enum plugin_gen_ra *gen_ra, enum qemu_plugin_mem_rw rw, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { if (cb->rw & rw) { switch (cb->type) { case PLUGIN_CB_MEM_REGULAR: + inject_ra(gen_ra); gen_mem_cb(cb, meminfo, addr); break; default: - inject_cb(cb); + inject_cb(cb, gen_ra); break; } } @@ -186,6 +221,7 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) { TCGOp *op, *next; int insn_idx = -1; + enum plugin_gen_ra gen_ra; if (unlikely(qemu_loglevel_mask(LOG_TB_OP_PLUGIN) && qemu_log_in_addr_range(plugin_tb->vaddr))) { @@ -205,10 +241,12 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) */ memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps)); + gen_ra = GEN_RA_FROM_TB; QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) { switch (op->opc) { case INDEX_op_insn_start: insn_idx++; + gen_ra = GEN_RA_FROM_INSN; break; case INDEX_op_plugin_cb: @@ -244,7 +282,8 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) cbs = plugin_tb->cbs; for (i = 0, n = (cbs ? cbs->len : 0); i < n; i++) { inject_cb( - &g_array_index(cbs, struct qemu_plugin_dyn_cb, i)); + &g_array_index(cbs, struct qemu_plugin_dyn_cb, i), + &gen_ra); } break; @@ -256,7 +295,8 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) cbs = insn->insn_cbs; for (i = 0, n = (cbs ? cbs->len : 0); i < n; i++) { inject_cb( - &g_array_index(cbs, struct qemu_plugin_dyn_cb, i)); + &g_array_index(cbs, struct qemu_plugin_dyn_cb, i), + &gen_ra); } break; @@ -288,7 +328,7 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) cbs = insn->mem_cbs; for (i = 0, n = (cbs ? cbs->len : 0); i < n; i++) { inject_mem_cb(&g_array_index(cbs, struct qemu_plugin_dyn_cb, i), - rw, meminfo, addr); + &gen_ra, rw, meminfo, addr); } tcg_ctx->emit_before_op = NULL;