@@ -96,7 +96,6 @@ typedef struct PCMachineClass {
/* ACPI compat: */
bool has_acpi_build;
- int pci_root_uid;
/* SMBIOS compat: */
bool smbios_defaults;
@@ -127,6 +126,9 @@ typedef struct PCMachineClass {
typedef struct PcPciMachineClass {
PCMachineClass parent_class;
+
+ /* ACPI compat: */
+ int pci_root_uid;
} PcPciMachineClass;
#define TYPE_PC_MACHINE "common-pc-machine"
@@ -1426,6 +1426,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
CrsRangeSet crs_range_set;
PCMachineState *pcms = PC_MACHINE(machine);
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(machine);
+ PcPciMachineClass *ppmc;
X86MachineState *x86ms = X86_MACHINE(machine);
AcpiMcfgInfo mcfg;
bool mcfg_valid = !!acpi_get_mcfg(&mcfg);
@@ -1448,10 +1449,12 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
build_dbg_aml(dsdt);
if (i440fx) {
+ ppmc = PC_PCI_MACHINE_GET_CLASS(machine);
+
sb_scope = aml_scope("_SB");
dev = aml_device("PCI0");
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
- aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(ppmc->pci_root_uid)));
aml_append(dev, aml_pci_edsm());
aml_append(sb_scope, dev);
aml_append(dsdt, sb_scope);
@@ -1461,11 +1464,13 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
}
build_piix4_pci0_int(dsdt);
} else if (q35) {
+ ppmc = PC_PCI_MACHINE_GET_CLASS(machine);
+
sb_scope = aml_scope("_SB");
dev = aml_device("PCI0");
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
- aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(ppmc->pci_root_uid)));
aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
aml_append(dev, aml_pci_edsm());
aml_append(sb_scope, dev);
@@ -468,9 +468,11 @@ static void pc_xen_hvm_init(MachineState *machine)
static void pc_i440fx_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
+ PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
ObjectClass *oc = OBJECT_CLASS(m);
+
pcmc->default_south_bridge = TYPE_PIIX3_DEVICE;
- pcmc->pci_root_uid = 0;
+ ppmc->pci_root_uid = 0;
pcmc->default_cpu_version = 1;
m->family = "pc_piix";
@@ -622,12 +624,13 @@ DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL,
static void pc_i440fx_5_1_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
+ PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
pc_i440fx_5_2_machine_options(m);
compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
pcmc->kvmclock_create_always = false;
- pcmc->pci_root_uid = 1;
+ ppmc->pci_root_uid = 1;
}
DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL,
@@ -345,7 +345,9 @@ static void pc_q35_init(MachineState *machine)
static void pc_q35_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
- pcmc->pci_root_uid = 0;
+ PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
+
+ ppmc->pci_root_uid = 0;
pcmc->default_cpu_version = 1;
m->family = "pc_q35";
@@ -495,12 +497,13 @@ DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL,
static void pc_q35_5_1_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
+ PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
pc_q35_5_2_machine_options(m);
compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
pcmc->kvmclock_create_always = false;
- pcmc->pci_root_uid = 1;
+ ppmc->pci_root_uid = 1;
}
DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL,
The 'pci_root_uid' field is irrelevant for non-PCI machines, restrict it to the PcPciMachineClass. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- include/hw/i386/pc.h | 4 +++- hw/i386/acpi-build.c | 9 +++++++-- hw/i386/pc_piix.c | 7 +++++-- hw/i386/pc_q35.c | 7 +++++-- 4 files changed, 20 insertions(+), 7 deletions(-)