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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id f8-20020a17090624c800b00a46fbff47a6sm891626ejb.168.2024.03.28.08.57.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:06 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 23/29] hw/i386/fw_cfg: Inline smbios_defaults() Date: Thu, 28 Mar 2024 16:54:31 +0100 Message-ID: <20240328155439.58719-24-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All PCI-based machines have the smbios_defaults field set to %true. Simplify by using an inlined helper checking whether the machine is PCI-based or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 1 - hw/i386/fw_cfg.c | 7 ++++++- hw/i386/pc.c | 1 - hw/i386/pc_piix.c | 1 - 4 files changed, 6 insertions(+), 4 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 7da0bc8aa4..6a6a8df005 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -86,7 +86,6 @@ typedef struct PCMachineClass { int default_cpu_version; /* SMBIOS compat: */ - bool smbios_defaults; bool smbios_legacy_mode; SmbiosEntryPointType default_smbios_ep_type; diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 14a7dfbdc9..f60390ed56 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -49,6 +49,11 @@ const char *fw_cfg_arch_key_name(uint16_t key) } #ifdef CONFIG_SMBIOS +static bool smbios_defaults(PCMachineState *pcms) +{ + return pc_machine_is_pci_enabled(pcms); +} + void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, SmbiosEntryPointType ep_type) { @@ -61,7 +66,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, MachineClass *mc = MACHINE_GET_CLASS(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); - if (pcmc->smbios_defaults) { + if (smbios_defaults(pcms)) { /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", mc->desc, mc->name); } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b83abee8e9..7a758a2e84 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1754,7 +1754,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) PCMachineClass *pcmc = PC_MACHINE_CLASS(oc); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); - pcmc->smbios_defaults = true; pcmc->enforce_amd_1tb_hole = true; pcmc->pvh_enabled = true; pcmc->kvmclock_create_always = true; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index e6178f8653..70dc8686f9 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -828,7 +828,6 @@ static void isapc_machine_options(MachineClass *m) m->max_cpus = 1; m->option_rom_has_mr = true; m->rom_file_has_mr = false; - pcmc->smbios_defaults = false; pcmc->smbios_legacy_mode = true; m->default_nic = "ne2k_isa"; m->default_cpu_type = X86_CPU_TYPE_NAME("486");