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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id u23-20020a170906125700b00a47522c193asm892212eja.196.2024.03.28.08.56.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 20/29] hw/i386/pc: Pass PcPciMachineState argument to pc_pci_hole64_start() Date: Thu, 28 Mar 2024 16:54:28 +0100 Message-ID: <20240328155439.58719-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pc_pci_hole64_start() is only used by PCI-based machines. Pass it a PcPciMachineState argument, removing a qdev_get_machine() call. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 2 +- hw/i386/pc.c | 8 ++++---- hw/pci-host/i440fx.c | 2 +- hw/pci-host/q35.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index df4c813854..7da0bc8aa4 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -157,7 +157,7 @@ void pc_memory_init(PCMachineState *pcms, MemoryRegion *system_memory, MemoryRegion *rom_memory, uint64_t pci_hole64_size); -uint64_t pc_pci_hole64_start(void); +uint64_t pc_pci_hole64_start(PcPciMachineState *ppms); DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); void pc_basic_device_init(struct PCMachineState *pcms, ISABus *isa_bus, qemu_irq *gsi, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d8e91d18b8..b83abee8e9 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -747,7 +747,8 @@ static hwaddr pc_max_used_gpa(PCMachineState *pcms, uint64_t pci_hole64_size) if (cpu->env.features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { /* 64-bit systems */ - return pc_pci_hole64_start() + pci_hole64_size - 1; + PcPciMachineState *ppms = PC_PCI_MACHINE(pcms); + return pc_pci_hole64_start(ppms) + pci_hole64_size - 1; } /* 32-bit systems */ @@ -1016,11 +1017,10 @@ void pc_memory_init(PCMachineState *pcms, * The 64bit pci hole starts after "above 4G RAM" and * potentially the space reserved for memory hotplug. */ -uint64_t pc_pci_hole64_start(void) +uint64_t pc_pci_hole64_start(PcPciMachineState *ppms) { - PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); + PCMachineState *pcms = PC_MACHINE(ppms); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); - PcPciMachineState *ppms = PC_PCI_MACHINE(pcms); MachineState *ms = MACHINE(pcms); uint64_t hole64_start = 0; ram_addr_t size = 0; diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 4f0a0438d7..add99e4f76 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -180,7 +180,7 @@ static uint64_t i440fx_pcihost_get_pci_hole64_start_value(Object *obj) pci_bus_get_w64_range(h->bus, &w64); value = range_is_empty(&w64) ? 0 : range_lob(&w64); if (!value && s->pci_hole64_fix) { - value = pc_pci_hole64_start(); + value = pc_pci_hole64_start(PC_PCI_MACHINE(qdev_get_machine())); } return value; } diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 0d7d4e3f08..baf55897b2 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -123,7 +123,7 @@ static uint64_t q35_host_get_pci_hole64_start_value(Object *obj) pci_bus_get_w64_range(h->bus, &w64); value = range_is_empty(&w64) ? 0 : range_lob(&w64); if (!value && s->pci_hole64_fix) { - value = pc_pci_hole64_start(); + value = pc_pci_hole64_start(PC_PCI_MACHINE(qdev_get_machine())); } return value; }