@@ -38,7 +38,6 @@ typedef struct PCMachineState {
uint64_t max_ram_below_4g;
OnOffAuto vmport;
SmbiosEntryPointType smbios_entry_point_type;
- const char *south_bridge;
bool smbus_enabled;
bool sata_enabled;
@@ -59,6 +58,7 @@ typedef struct PcPciMachineState {
Notifier machine_done;
bool acpi_build_enabled;
+ const char *southbridge_typename;
uint64_t max_fw_size;
PFlashCFI01 *flash[2];
@@ -88,9 +88,6 @@ typedef struct PcPciMachineState {
typedef struct PCMachineClass {
X86MachineClass parent_class;
- /* Device configuration: */
- const char *default_south_bridge;
-
/* Compat options: */
/* Default CPU model version. See x86_cpu_set_default_version(). */
@@ -126,6 +123,9 @@ typedef struct PCMachineClass {
typedef struct PcPciMachineClass {
PCMachineClass parent_class;
+ /* Device configuration: */
+ const char *default_southbridge_typename;
+
/* ACPI compat: */
int pci_root_uid;
} PcPciMachineClass;
@@ -1667,7 +1667,6 @@ static void pc_machine_initfn(Object *obj)
#endif /* CONFIG_VMPORT */
pcms->max_ram_below_4g = 0; /* use default */
pcms->smbios_entry_point_type = pcmc->default_smbios_ep_type;
- pcms->south_bridge = pcmc->default_south_bridge;
pcms->smbus_enabled = true;
pcms->sata_enabled = true;
@@ -1689,9 +1688,11 @@ static void pc_machine_initfn(Object *obj)
static void pc_pci_machine_initfn(Object *obj)
{
PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
+ PcPciMachineClass *ppmc = PC_PCI_MACHINE_GET_CLASS(ppms);
ppms->acpi_build_enabled = true;
ppms->max_fw_size = 8 * MiB;
+ ppms->southbridge_typename = ppmc->default_southbridge_typename;
pc_system_flash_create(ppms);
cxl_machine_init(obj, &ppms->cxl_devices_state);
@@ -243,7 +243,7 @@ static void pc_init1(MachineState *machine, const char *pci_type)
DeviceState *dev;
size_t i;
- pci_dev = pci_new_multifunction(-1, pcms->south_bridge);
+ pci_dev = pci_new_multifunction(-1, ppms->southbridge_typename);
object_property_set_bool(OBJECT(pci_dev), "has-usb",
machine_usb(machine), &error_abort);
object_property_set_bool(OBJECT(pci_dev), "has-acpi",
@@ -385,12 +385,12 @@ static const QEnumLookup PCSouthBridgeOption_lookup = {
static int pc_get_south_bridge(Object *obj, Error **errp)
{
- PCMachineState *pcms = PC_MACHINE(obj);
+ PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
int i;
for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) {
if (g_strcmp0(PCSouthBridgeOption_lookup.array[i],
- pcms->south_bridge) == 0) {
+ ppms->southbridge_typename) == 0) {
return i;
}
}
@@ -401,7 +401,7 @@ static int pc_get_south_bridge(Object *obj, Error **errp)
static void pc_set_south_bridge(Object *obj, int value, Error **errp)
{
- PCMachineState *pcms = PC_MACHINE(obj);
+ PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
if (value < 0) {
error_setg(errp, "Value can't be negative");
@@ -413,7 +413,7 @@ static void pc_set_south_bridge(Object *obj, int value, Error **errp)
return;
}
- pcms->south_bridge = PCSouthBridgeOption_lookup.array[value];
+ ppms->southbridge_typename = PCSouthBridgeOption_lookup.array[value];
}
/* Looking for a pc_compat_2_4() function? It doesn't exist.
@@ -472,7 +472,7 @@ static void pc_i440fx_machine_options(MachineClass *m)
PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
ObjectClass *oc = OBJECT_CLASS(m);
- pcmc->default_south_bridge = TYPE_PIIX3_DEVICE;
+ ppmc->default_southbridge_typename = TYPE_PIIX3_DEVICE;
ppmc->pci_root_uid = 0;
pcmc->default_cpu_version = 1;
South bridge type is only relevant for the i440fx/piix machine, which is PCI-based. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- include/hw/i386/pc.h | 8 ++++---- hw/i386/pc.c | 3 ++- hw/i386/pc_piix.c | 12 ++++++------ 3 files changed, 12 insertions(+), 11 deletions(-)