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[PATCH-for-9.0?,v2,1/3] fpu/softfloat: Remove mention of TILE-Gx target

Message ID 20240327144806.11319-2-philmd@linaro.org
State Superseded
Headers show
Series target/nios2: Remove the deprecated Nios II target | expand

Commit Message

Philippe Mathieu-Daudé March 27, 2024, 2:48 p.m. UTC
TILE-Gx has been removed during the v6.0 release (see
commit 2cc1a90166 "Remove deprecated target tilegx"),
no need to mention it in the list of "supported targets".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 fpu/softfloat-specialize.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Thomas Huth March 27, 2024, 3:41 p.m. UTC | #1
On 27/03/2024 15.48, Philippe Mathieu-Daudé wrote:
> TILE-Gx has been removed during the v6.0 release (see
> commit 2cc1a90166 "Remove deprecated target tilegx"),
> no need to mention it in the list of "supported targets".
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   fpu/softfloat-specialize.c.inc | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
> index 1610472cfc..1c85c48a73 100644
> --- a/fpu/softfloat-specialize.c.inc
> +++ b/fpu/softfloat-specialize.c.inc
> @@ -152,7 +152,7 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status)
>       /*
>        * This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V,
>        * S390, SH4, TriCore, and Xtensa.  Our other supported targets,
> -     * CRIS, Nios2, and Tile, do not have floating-point.
> +     * CRIS and Nios2, do not have floating-point.
>        */
>       if (snan_bit_is_one(status)) {
>           /* set all bits other than msb */

Reviewed-by: Thomas Huth <thuth@redhat.com>
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Patch

diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index 1610472cfc..1c85c48a73 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -152,7 +152,7 @@  static void parts64_default_nan(FloatParts64 *p, float_status *status)
     /*
      * This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V,
      * S390, SH4, TriCore, and Xtensa.  Our other supported targets,
-     * CRIS, Nios2, and Tile, do not have floating-point.
+     * CRIS and Nios2, do not have floating-point.
      */
     if (snan_bit_is_one(status)) {
         /* set all bits other than msb */