From patchwork Tue Mar 26 18:10:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 782633 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp1823072wrt; Tue, 26 Mar 2024 11:13:57 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVbaseJ26YWqGL7Y2m6ceyGYfdocYyTRJP+qdKtGZORjmnNalGoI0KZzUvC4XigthR8CeUaqrOPy8HiCdIGsPty X-Google-Smtp-Source: AGHT+IE1UQ+w5DzbnBEoxSbBdkSQiGjncJ5i68DAlkGBsnC7auxhQXE13cS1LmOOKxS6QowFWKsp X-Received: by 2002:a05:6102:3e8c:b0:476:e72e:2236 with SMTP id m12-20020a0561023e8c00b00476e72e2236mr8094439vsv.12.1711476837519; Tue, 26 Mar 2024 11:13:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711476837; cv=none; d=google.com; s=arc-20160816; b=RAVZoF+hO8vRaUiqS/rJrIyHgfJfJbX9KhyvfnsWPMt5AtUTdTzLKqeaBHEPzBIvik UoJz9yPmmaOagMzXuUAavescqaAwVPqg5g3pSJaHomS5MjKsY0+gaDsSQ8yDpe+HMA/O tj7RuzDEkU5boDGwlHzsw512x+X/AUN8fCBtqdU4863l4J6e6R/9aDTMDD6INCHuUrOe rc1gFtoxfqw070g90q8XS5SIS1f49RC+0n5OfmWT5qSqQEU5+UXYhTfF/AsqXnMqyDwG BL4RiPqKtclGUU5v53ruJzywkNvGHfJ38xE9ihHS4+oP8sH9SSx6jGP3Gbp02kwiOqYO YWqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=m1ZbZybHY9lhm5Q1WYSajtVJ/Bd2oVTk+eDSnSXGvRY=; fh=YI/QY2HyxQFQRiISZkpZFrjEn9G5f7qiOyjDMr3RXJU=; b=H9cspH8WEcFSzBFkQ0dnaDV46H4RzUv4G/JOy6Hedh+pPiKMGK3dSkJP01+3Sbm4XY Qgxsu7VsFbTELpsBERgxRr1AH3YlNLoHmRIVFR8mKOIVmPEXpn7xxYa9EbZWDAE9fJUA esMnU2eyVVl+2u+w1LwPf+pjdvHcaOGWOQSXFbX0UuCSdDCgDFePs9/Lgo49trzSiDB3 RGcTpc88W/jxQmhyGcc7yG7Jj9xFtFNscPsAM1ze8k4O8JAnCeMAWvyceFCofEX7+RPW iUQ6FdAzuWdY4UktHwbiLM1t8HLZL+nHt6OpMIyoz3+1qcvuToHojzZI9+iDYI4DdVuH Mi8Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=htfheGND; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k13-20020a67ef4d000000b004769aefa564si1355893vsr.542.2024.03.26.11.13.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 26 Mar 2024 11:13:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=htfheGND; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rpBI0-0003M4-J3; Tue, 26 Mar 2024 14:12:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rpBHz-0003Le-AH for qemu-devel@nongnu.org; Tue, 26 Mar 2024 14:12:47 -0400 Received: from mail-pf1-x42c.google.com ([2607:f8b0:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rpBHx-0006aD-LF for qemu-devel@nongnu.org; Tue, 26 Mar 2024 14:12:47 -0400 Received: by mail-pf1-x42c.google.com with SMTP id d2e1a72fcca58-6ea8ee55812so3467864b3a.0 for ; Tue, 26 Mar 2024 11:12:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1711476764; x=1712081564; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=m1ZbZybHY9lhm5Q1WYSajtVJ/Bd2oVTk+eDSnSXGvRY=; b=htfheGND1eg1pQLsSoZQksdkx7rhBcmUHfQiKdZeRJ9a+VRQ4+8l5mKd9ji8mbum14 5TvdlQYA3zxMXF7XJNKr9EGrF5lZBqmTRhtQITTkpWRektwdXKxNZ92JMA8gNvlPs+4V lU6b9nR5vjTtC/IP0lHdPSGWtjbuzukzQ0/G75ZzScUdWls+uAnh3+ZwcyETFnHcmJkh UtFxMaMFiqI+AcH1/77/yF3xDquGqweJIsYd2BYyRGxNzxuFZvAqplYd+PCvmNSdOH3U RAToDlwm0d1GUq6dzGvJXzSQIxcnCS/Ro59PI2j0sl2ohuMl4hjb066qNb2v41zz/HXF ++qQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711476764; x=1712081564; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m1ZbZybHY9lhm5Q1WYSajtVJ/Bd2oVTk+eDSnSXGvRY=; b=Gc44jYbSQ5PZJnGCvW9BcXddU8MyXeN5axccay5eTSI9iMeA1Jn5L/DejtKDFXaREJ 8UAVLJ9Hw3Zd7ErPSGro/xmkNjmm3WAWS1G/hlDRTq2fbP+CQJ9Z8tBW1yyhAe5rrMr8 6F0L+1Ey/zWsB0LSvEf2RD9ngmMQ07eGiRiu6+pIzOYZxIq3DJPfbsKo78GTHvfzrjF2 7jDKxKVpgIALGKeHgWKh6tDwqqAFoGxpfBPOtFq94msPUn5XgrEipzoDRrSdxr1Edgc1 6YCCojtP7bbSOMiNNDoQCEuabDDl1Yj2z3q8xMc8+iLSVF4LnoXBF7TguFjrwgvIu9C5 PWug== X-Gm-Message-State: AOJu0YzmuCh6SWAHWT7l0X1QWOnj+MbPBnHn2Wwup7FQxicxuF/UYmYT 619VWRerqQXiNxg2Wt4F8sbVp1vC4X3Ie+sdhnMxfrO8AeLsJspCyjQCPCgVy/8vHUTcLs1/7/m B X-Received: by 2002:a05:6a20:244d:b0:1a3:c404:37fc with SMTP id t13-20020a056a20244d00b001a3c40437fcmr9107588pzc.13.1711476764404; Tue, 26 Mar 2024 11:12:44 -0700 (PDT) Received: from stoup.. (173-197-098-125.biz.spectrum.com. [173.197.98.125]) by smtp.gmail.com with ESMTPSA id q27-20020a63751b000000b005bd980cca56sm7835336pgc.29.2024.03.26.11.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 11:12:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@kernel.org, Helge Deller Subject: [PATCH v2 3/3] target/hppa: Fix diag instructions to set/restore shadow registers Date: Tue, 26 Mar 2024 08:10:28 -1000 Message-Id: <20240326181028.332867-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326181028.332867-1-richard.henderson@linaro.org> References: <20240326181028.332867-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The 32-bit 7300LC CPU and the 64-bit PCX-W 8500 CPU use different diag instructions to save or restore the CPU registers to/from the shadow registers. Implement those per-CPU architecture diag instructions to fix those parts of the HP ODE testcases (L2DIAG and WDIAG, section 1) which test the shadow registers. Signed-off-by: Helge Deller [rth: Use decodetree to distinguish cases] Signed-off-by: Richard Henderson Reviewed-by: Helge Deller Tested-by: Helge Deller --- target/hppa/insns.decode | 10 ++++++++++ target/hppa/translate.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 9f6ffd8e2c..c2acb3796c 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -65,6 +65,8 @@ # Argument set definitions #### +&empty + # All insns that need to form a virtual address should use this set. &ldst t b x disp sp m scale size @@ -638,6 +640,14 @@ xmpyu 001110 ..... ..... 010 .0111 .00 t:5 r1=%ra64 r2=%rb64 [ diag_btlb 000101 00 0000 0000 0000 0001 0000 0000 diag_cout 000101 00 0000 0000 0000 0001 0000 0001 + + # For 32-bit 7300C + diag_getshadowregs_pa1 000101 00 0000 0000 0001 1010 0000 0000 + diag_putshadowregs_pa1 000101 00 0000 0000 0001 1010 0100 0000 + + # For 64-bit PCX-W 8500 + diag_getshadowregs_pa2 000101 00 0111 1000 0001 1000 0100 0000 + diag_putshadowregs_pa2 000101 00 0111 0000 0001 1000 0100 0000 ] diag_unimp 000101 i:26 } diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 42dd3f2c8d..143818c2d9 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2399,6 +2399,20 @@ static bool do_getshadowregs(DisasContext *ctx) return nullify_end(ctx); } +static bool do_putshadowregs(DisasContext *ctx) +{ + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + nullify_over(ctx); + tcg_gen_st_i64(cpu_gr[1], tcg_env, offsetof(CPUHPPAState, shadow[0])); + tcg_gen_st_i64(cpu_gr[8], tcg_env, offsetof(CPUHPPAState, shadow[1])); + tcg_gen_st_i64(cpu_gr[9], tcg_env, offsetof(CPUHPPAState, shadow[2])); + tcg_gen_st_i64(cpu_gr[16], tcg_env, offsetof(CPUHPPAState, shadow[3])); + tcg_gen_st_i64(cpu_gr[17], tcg_env, offsetof(CPUHPPAState, shadow[4])); + tcg_gen_st_i64(cpu_gr[24], tcg_env, offsetof(CPUHPPAState, shadow[5])); + tcg_gen_st_i64(cpu_gr[25], tcg_env, offsetof(CPUHPPAState, shadow[6])); + return nullify_end(ctx); +} + static bool trans_getshadowregs(DisasContext *ctx, arg_getshadowregs *a) { return do_getshadowregs(ctx); @@ -4594,6 +4608,26 @@ static bool trans_diag_cout(DisasContext *ctx, arg_diag_cout *a) #endif } +static bool trans_diag_getshadowregs_pa1(DisasContext *ctx, arg_empty *a) +{ + return !ctx->is_pa20 && do_getshadowregs(ctx); +} + +static bool trans_diag_getshadowregs_pa2(DisasContext *ctx, arg_empty *a) +{ + return ctx->is_pa20 && do_getshadowregs(ctx); +} + +static bool trans_diag_putshadowregs_pa1(DisasContext *ctx, arg_empty *a) +{ + return !ctx->is_pa20 && do_putshadowregs(ctx); +} + +static bool trans_diag_putshadowregs_pa2(DisasContext *ctx, arg_empty *a) +{ + return ctx->is_pa20 && do_putshadowregs(ctx); +} + static bool trans_diag_unimp(DisasContext *ctx, arg_diag_unimp *a) { CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR);