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[209.51.188.17]) by mx.google.com with ESMTPS id i3-20020a05620a0a0300b00789f7960f32si5482580qka.781.2024.03.19.08.49.55 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Mar 2024 08:49:55 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="rqu/EkyS"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rmbdf-0006UP-D9; Tue, 19 Mar 2024 11:44:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rmbdF-0005tO-N7 for qemu-devel@nongnu.org; Tue, 19 Mar 2024 11:44:07 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rmbd0-0004yL-Ln for qemu-devel@nongnu.org; Tue, 19 Mar 2024 11:44:05 -0400 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-34005b5927eso2061204f8f.1 for ; Tue, 19 Mar 2024 08:43:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710863029; x=1711467829; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Uhrck07YAgtzhdFq8/D5fUYa0OpjmAt0ZJzdbBj3AUo=; b=rqu/EkySLXxLuBe89w6+sgPOBt2YinqCHysLniu6snnzBNL0LM9Bmucbl7hpMAlhRc wK6EIlb0wdHq1Tq3kC00WQx5fIVIlkd66wez6jZle/PqAOclD/riKF3cY48sXRFdjF3P UKLFEALzORtN1EEkRQf73vv/KeMQlDe3G98Hx+L+kJAsz6aVx0cUNV2Yzdn6ZaLmkSGE xNzYXKnGdXllCg5gyzd3VBKov1gE/9/6NFVUmD9sPWfaFEuuah5tauEgI7c/YEg9uwVY hEk1nYTE1xoDdBEpZVjvha33LJvi7pAaiMwqFtLORvN9N4B6/XDG5YKbOhRbnYON+HRO cd/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710863029; x=1711467829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Uhrck07YAgtzhdFq8/D5fUYa0OpjmAt0ZJzdbBj3AUo=; b=nw/hMWlStgXmXdxvPjN/YvXtWHI4udklNhtOXANiQB2rZ964UHP/V/TMeC4QQpqCB9 g/17DE5LvWCz7LH8GYwxf6rvqfpJvgAX+f/8eP/bT1uPm4T1zWwL9kKb1a/8j+QQrr1X PTpOeKnwO2rMceeQVos8Dj6DI6tfG35q2u0HYwoYeWtAscKAuNG67VSVBWDL2SjS0Jw4 iWCg2dLerS/P9A+YkGw5R+3FeYDI0H5TIOLJnsWna5f5P4nwHzqaBFyJZffVP7iiWz5n 13XzMS4pPTvyTJMXIx/QOLujQ9VhjxM1/cK2+wPXr8fop/8gUH9aJziIi5VGUn5YTQEk iXvw== X-Gm-Message-State: AOJu0YziZ07Si2ih/PjyevmUT8ZOL3v65i8acaLlh+3zXuH/CptULU2o q/AkZLzXn/KhQ4jzVujDLhtjPECxyDOMsXAHfoIlDlopBVd+dQ4mUSpZ6hZsH8lWq+83kzhFhRq W X-Received: by 2002:a5d:6a46:0:b0:33e:cc2e:8286 with SMTP id t6-20020a5d6a46000000b0033ecc2e8286mr9495145wrw.59.1710863028662; Tue, 19 Mar 2024 08:43:48 -0700 (PDT) Received: from m1x-phil.lan ([176.176.166.129]) by smtp.gmail.com with ESMTPSA id w10-20020adff9ca000000b0033e72e104c5sm12591686wrr.34.2024.03.19.08.43.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 19 Mar 2024 08:43:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Brian Cain Subject: [PATCH-for-9.1 08/27] target/hexagon: Convert to TCGCPUOps::get_cpu_state() Date: Tue, 19 Mar 2024 16:42:37 +0100 Message-ID: <20240319154258.71206-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240319154258.71206-1-philmd@linaro.org> References: <20240319154258.71206-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert cpu_get_tb_cpu_state() to TCGCPUOps::get_cpu_state(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Brian Cain --- target/hexagon/cpu.h | 14 -------------- target/hexagon/cpu.c | 13 +++++++++++++ 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 935a9c3276..1d42c33827 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -134,20 +134,6 @@ struct ArchCPU { FIELD(TB_FLAGS, IS_TIGHT_LOOP, 0, 1) -#define TARGET_HAS_CPU_GET_TB_CPU_STATE - -static inline void cpu_get_tb_cpu_state(CPUHexagonState *env, vaddr *pc, - uint64_t *cs_base, uint32_t *flags) -{ - uint32_t hex_flags = 0; - *pc = env->gpr[HEX_REG_PC]; - *cs_base = 0; - if (*pc == env->gpr[HEX_REG_SA0]) { - hex_flags = FIELD_DP32(hex_flags, TB_FLAGS, IS_TIGHT_LOOP, 1); - } - *flags = hex_flags; -} - typedef HexagonCPU ArchCPU; void hexagon_translate_init(void); diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 3a716b9be3..5e0a9441f2 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -273,6 +273,18 @@ static void hexagon_restore_state_to_opc(CPUState *cs, cpu_env(cs)->gpr[HEX_REG_PC] = data[0]; } +static void hexagon_get_cpu_state(CPUHexagonState *env, vaddr *pc, + uint64_t *cs_base, uint32_t *flags) +{ + uint32_t hex_flags = 0; + *pc = env->gpr[HEX_REG_PC]; + *cs_base = 0; + if (*pc == env->gpr[HEX_REG_SA0]) { + hex_flags = FIELD_DP32(hex_flags, TB_FLAGS, IS_TIGHT_LOOP, 1); + } + *flags = hex_flags; +} + static void hexagon_cpu_reset_hold(Object *obj) { CPUState *cs = CPU(obj); @@ -327,6 +339,7 @@ static const TCGCPUOps hexagon_tcg_ops = { .initialize = hexagon_translate_init, .synchronize_from_tb = hexagon_cpu_synchronize_from_tb, .restore_state_to_opc = hexagon_restore_state_to_opc, + .get_cpu_state = hexagon_get_cpu_state, }; static void hexagon_cpu_class_init(ObjectClass *c, void *data)