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Iglesias" , Laurent Vivier , Anton Johansson , Alistair Francis , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [RFC PATCH-for-9.1 8/8] target/microblaze: Widen $ear to 64-bit Date: Tue, 19 Mar 2024 07:28:55 +0100 Message-ID: <20240319062855.8025-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240319062855.8025-1-philmd@linaro.org> References: <20240319062855.8025-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The Exception Address Register is 64-bit wide. User emulation only access the 32 lower bits. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Edgar E. Iglesias --- target/microblaze/cpu.h | 2 +- linux-user/elfload.c | 2 +- target/microblaze/gdbstub.c | 2 +- target/microblaze/translate.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index c3e2aba0ec..a9f93b37b7 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -251,7 +251,7 @@ struct CPUArchState { uint32_t pc; uint32_t msr; /* All bits of MSR except MSR[C] and MSR[CC] */ uint32_t msr_c; /* MSR[C], in low bit; other bits must be 0 */ - target_ulong ear; + uint64_t ear; uint32_t esr; uint32_t fsr; uint32_t btr; diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 60cf55b36c..4612aef95a 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1498,7 +1498,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMBState *env (*regs)[pos++] = tswapreg(env->pc); (*regs)[pos++] = tswapreg(mb_cpu_read_msr(env)); (*regs)[pos++] = 0; - (*regs)[pos++] = tswapreg(env->ear); + (*regs)[pos++] = tswapreg((uint32_t)env->ear); (*regs)[pos++] = 0; (*regs)[pos++] = tswapreg(env->esr); } diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index 09d74e164d..147d20c3e4 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -63,7 +63,7 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) val = mb_cpu_read_msr(env); break; case GDB_EAR: - val = env->ear; + val = (uint32_t)env->ear; break; case GDB_ESR: val = env->esr; diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 493850c544..19b180501f 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1835,7 +1835,7 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags) } qemu_fprintf(f, "\nesr=0x%04x fsr=0x%02x btr=0x%08x edr=0x%x\n" - "ear=0x" TARGET_FMT_lx " slr=0x%x shr=0x%x\n", + "ear=0x%" PRIx64 " slr=0x%x shr=0x%x\n", env->esr, env->fsr, env->btr, env->edr, env->ear, env->slr, env->shr);