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Fri, 15 Mar 2024 06:09:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Cc: qemu-riscv@nongnu.org, Anton Johansson , qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Daniel_P_=2E_Berrang?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Eduardo Habkost , Claudio Fontana , Richard Henderson , Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , Manos Pitsidianakis , Zhao Liu , qemu-arm@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-9.1 01/21] target/i386: Declare CPU QOM types using DEFINE_TYPES() macro Date: Fri, 15 Mar 2024 14:08:49 +0100 Message-ID: <20240315130910.15750-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240315130910.15750-1-philmd@linaro.org> References: <20240315130910.15750-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. In few commits we are going to add more types, so replace the type_register_static() to ease further reviews. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Zhao Liu Message-Id: <20231013140116.255-14-philmd@linaro.org> --- target/i386/cpu.c | 50 ++++++++++++++++++++++------------------------- 1 file changed, 23 insertions(+), 27 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 9a210d8d92..ebf555f50f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4991,13 +4991,6 @@ static void max_x86_cpu_initfn(Object *obj) &error_abort); } -static const TypeInfo max_x86_cpu_type_info = { - .name = X86_CPU_TYPE_NAME("max"), - .parent = TYPE_X86_CPU, - .instance_init = max_x86_cpu_initfn, - .class_init = max_x86_cpu_class_init, -}; - static char *feature_word_description(FeatureWordInfo *f, uint32_t bit) { assert(f->type == CPUID_FEATURE_WORD || f->type == MSR_FEATURE_WORD); @@ -8041,19 +8034,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) } } -static const TypeInfo x86_cpu_type_info = { - .name = TYPE_X86_CPU, - .parent = TYPE_CPU, - .instance_size = sizeof(X86CPU), - .instance_align = __alignof(X86CPU), - .instance_init = x86_cpu_initfn, - .instance_post_init = x86_cpu_post_initfn, - - .abstract = true, - .class_size = sizeof(X86CPUClass), - .class_init = x86_cpu_common_class_init, -}; - /* "base" CPU model, used by query-cpu-model-expansion */ static void x86_cpu_base_class_init(ObjectClass *oc, void *data) { @@ -8065,22 +8045,38 @@ static void x86_cpu_base_class_init(ObjectClass *oc, void *data) xcc->ordering = 8; } -static const TypeInfo x86_base_cpu_type_info = { - .name = X86_CPU_TYPE_NAME("base"), - .parent = TYPE_X86_CPU, - .class_init = x86_cpu_base_class_init, +static const TypeInfo x86_cpu_types[] = { + { + .name = TYPE_X86_CPU, + .parent = TYPE_CPU, + .abstract = true, + .instance_size = sizeof(X86CPU), + .instance_align = __alignof(X86CPU), + .instance_init = x86_cpu_initfn, + .instance_post_init = x86_cpu_post_initfn, + .class_size = sizeof(X86CPUClass), + .class_init = x86_cpu_common_class_init, + }, { + .name = X86_CPU_TYPE_NAME("base"), + .parent = TYPE_X86_CPU, + .class_init = x86_cpu_base_class_init, + }, { + .name = X86_CPU_TYPE_NAME("max"), + .parent = TYPE_X86_CPU, + .instance_init = max_x86_cpu_initfn, + .class_init = max_x86_cpu_class_init, + } }; +DEFINE_TYPES(x86_cpu_types) + static void x86_cpu_register_types(void) { int i; - type_register_static(&x86_cpu_type_info); for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { x86_register_cpudef_types(&builtin_x86_defs[i]); } - type_register_static(&max_x86_cpu_type_info); - type_register_static(&x86_base_cpu_type_info); } type_init(x86_cpu_register_types)