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[209.51.188.17]) by mx.google.com with ESMTPS id t8-20020a05620a450800b0078843dc74afsi164742qkp.60.2024.03.06.06.46.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 06 Mar 2024 06:46:52 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kMyfrYYk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rhsSG-00085F-9s; Wed, 06 Mar 2024 09:41:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rhsSA-0007md-1U for qemu-devel@nongnu.org; Wed, 06 Mar 2024 09:41:06 -0500 Received: from mail-lf1-x131.google.com ([2a00:1450:4864:20::131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rhsS1-0001Ua-F4 for qemu-devel@nongnu.org; Wed, 06 Mar 2024 09:41:05 -0500 Received: by mail-lf1-x131.google.com with SMTP id 2adb3069b0e04-5131f3fc695so7463897e87.1 for ; Wed, 06 Mar 2024 06:40:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709736054; x=1710340854; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XMeTxKmqp9miHhSdB4IxGhpY7umFJf1vLBReY1fQxUM=; b=kMyfrYYkG5K8fLslQboPg4v3M+vOJ4tmrZoO3qdSVXYe2iCdAYOqzRxGh3ZXpsUJdu CL9XU8uuOW4zfOaYEDUYi36/1NG+GsFVDui/MjTs1WQmrg2R0Rr8oVNIt55k15xCJKVw TDgLBgRbJCrMcoiUT7r0ASZnuplygiAACe0UDfJNVLN3G1EkcnrtWwcmz893RrPmvl3B kSPFNUCtAgyHAjw+XSCvJxwgIj0ubElaye/h6EwPznqFFuXnxWbOYIWmel5i9UlMKAZv 4zOgst+4xB16+CDJ4ntZ1YWEznAZfeD2G9DjdhZ6uDjHotlMhZqVAs42G2+e9XmA+7Ha 6i0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709736054; x=1710340854; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XMeTxKmqp9miHhSdB4IxGhpY7umFJf1vLBReY1fQxUM=; b=YqWeT+6PzkaxBfIJYhBa9Sao1tHKcGOc1Wdpoqo4dZEnlPxmCAKLMjIKuOUoSwZ9sm YOFmEIkI8WLywwDeCRiXgJpw7Fpm8zF0al1J0+hAYLZQFcAOOBI2dcTeYfpC+ZnayrKL mqqxv5ZI/JmAtNuaMfNq+N7WZnx9c7lju+Ty6mhetrEdLC8YvJhoFoyoApf6wXhjCx1v lN4ZTPTR3dq3NOw7hkCzc4KFXIEkqCtrlllarHz0zHKnj+NbQvkEcLE+iMgbeyhyIQEx jmAAdUDe9y4cbU7Lm58a4D3gMySExErvzaOr8eTPgevBObWkUuUtRxSzHHBUe3NsW+4r 3vEg== X-Gm-Message-State: AOJu0YxBHwpv+1RXQ2WQJa5rqdrFFR7QFdQl+UQ2L6/3YYt98+bGDrYZ hPzCNN1EcN3lnd9r3E4dbKqAdPZ8mzz4pcFL1o83G0hv5upMgCsrpA43qUqTwPY= X-Received: by 2002:a05:6512:3ee:b0:513:593e:12c3 with SMTP id n14-20020a05651203ee00b00513593e12c3mr2101098lfq.50.1709736054316; Wed, 06 Mar 2024 06:40:54 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id l22-20020a05600c4f1600b004128f41a13fsm21333759wmq.38.2024.03.06.06.40.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Mar 2024 06:40:52 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 3508D5F950; Wed, 6 Mar 2024 14:40:43 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Pierrick Bouvier , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , Richard Henderson , Paolo Bonzini , Alexandre Iooss , Mahmoud Mandour Subject: [PULL 17/29] plugins: add inline operation per vcpu Date: Wed, 6 Mar 2024 14:40:29 +0000 Message-Id: <20240306144041.3787188-18-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240306144041.3787188-1-alex.bennee@linaro.org> References: <20240306144041.3787188-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x131.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Extends API with three new functions: qemu_plugin_register_vcpu_{tb, insn, mem}_exec_inline_per_vcpu(). Those functions takes a qemu_plugin_u64 as input. This allows to have a thread-safe and type-safe version of inline operations. Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240304130036.124418-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240305121005.3528075-18-alex.bennee@linaro.org> diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index bf96d2c2aa3..12a96cea2a4 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -92,6 +92,7 @@ struct qemu_plugin_dyn_cb { /* fields specific to each dyn_cb type go here */ union { struct { + qemu_plugin_u64 entry; enum qemu_plugin_op op; uint64_t imm; } inline_insn; diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index ebf9a645e15..6bbad068c01 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -328,6 +328,22 @@ void qemu_plugin_register_vcpu_tb_exec_inline(struct qemu_plugin_tb *tb, enum qemu_plugin_op op, void *ptr, uint64_t imm); +/** + * qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu() - execution inline op + * @tb: the opaque qemu_plugin_tb handle for the translation + * @op: the type of qemu_plugin_op (e.g. ADD_U64) + * @entry: entry to run op + * @imm: the op data (e.g. 1) + * + * Insert an inline op on a given scoreboard entry. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( + struct qemu_plugin_tb *tb, + enum qemu_plugin_op op, + qemu_plugin_u64 entry, + uint64_t imm); + /** * qemu_plugin_register_vcpu_insn_exec_cb() - register insn execution cb * @insn: the opaque qemu_plugin_insn handle for an instruction @@ -358,6 +374,22 @@ void qemu_plugin_register_vcpu_insn_exec_inline(struct qemu_plugin_insn *insn, enum qemu_plugin_op op, void *ptr, uint64_t imm); +/** + * qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu() - insn exec inline op + * @insn: the opaque qemu_plugin_insn handle for an instruction + * @op: the type of qemu_plugin_op (e.g. ADD_U64) + * @entry: entry to run op + * @imm: the op data (e.g. 1) + * + * Insert an inline op to every time an instruction executes. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( + struct qemu_plugin_insn *insn, + enum qemu_plugin_op op, + qemu_plugin_u64 entry, + uint64_t imm); + /** * qemu_plugin_tb_n_insns() - query helper for number of insns in TB * @tb: opaque handle to TB passed to callback @@ -583,7 +615,24 @@ void qemu_plugin_register_vcpu_mem_inline(struct qemu_plugin_insn *insn, enum qemu_plugin_op op, void *ptr, uint64_t imm); - +/** + * qemu_plugin_register_vcpu_mem_inline_per_vcpu() - inline op for mem access + * @insn: handle for instruction to instrument + * @rw: apply to reads, writes or both + * @op: the op, of type qemu_plugin_op + * @entry: entry to run op + * @imm: immediate data for @op + * + * This registers a inline op every memory access generated by the + * instruction. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_mem_inline_per_vcpu( + struct qemu_plugin_insn *insn, + enum qemu_plugin_mem_rw rw, + enum qemu_plugin_op op, + qemu_plugin_u64 entry, + uint64_t imm); typedef void (*qemu_plugin_vcpu_syscall_cb_t)(qemu_plugin_id_t id, unsigned int vcpu_index, diff --git a/plugins/plugin.h b/plugins/plugin.h index 3bf1aaf5c2d..f6fa10a0f56 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -73,6 +73,12 @@ void plugin_register_inline_op(GArray **arr, enum qemu_plugin_op op, void *ptr, uint64_t imm); +void plugin_register_inline_op_on_entry(GArray **arr, + enum qemu_plugin_mem_rw rw, + enum qemu_plugin_op op, + qemu_plugin_u64 entry, + uint64_t imm); + void plugin_reset_uninstall(qemu_plugin_id_t id, qemu_plugin_simple_cb_t cb, bool reset); diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 0f8be53d394..47e05ec6347 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -443,6 +443,13 @@ static TCGOp *append_inline_cb(const struct qemu_plugin_dyn_cb *cb, char *ptr = cb->userp; size_t elem_size = 0; size_t offset = 0; + if (!ptr) { + /* use inline entry */ + ptr = cb->inline_insn.entry.score->data->data; + elem_size = g_array_get_element_size(cb->inline_insn.entry.score->data); + offset = cb->inline_insn.entry.offset; + } + op = copy_ld_i32(&begin_op, op); op = copy_mul_i32(&begin_op, op, elem_size); op = copy_ext_i32_ptr(&begin_op, op); diff --git a/plugins/api.c b/plugins/api.c index fa1daee8254..6470f1dc0f2 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -111,6 +111,18 @@ void qemu_plugin_register_vcpu_tb_exec_inline(struct qemu_plugin_tb *tb, } } +void qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( + struct qemu_plugin_tb *tb, + enum qemu_plugin_op op, + qemu_plugin_u64 entry, + uint64_t imm) +{ + if (!tb->mem_only) { + plugin_register_inline_op_on_entry( + &tb->cbs[PLUGIN_CB_INLINE], 0, op, entry, imm); + } +} + void qemu_plugin_register_vcpu_insn_exec_cb(struct qemu_plugin_insn *insn, qemu_plugin_vcpu_udata_cb_t cb, enum qemu_plugin_cb_flags flags, @@ -136,6 +148,18 @@ void qemu_plugin_register_vcpu_insn_exec_inline(struct qemu_plugin_insn *insn, } } +void qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( + struct qemu_plugin_insn *insn, + enum qemu_plugin_op op, + qemu_plugin_u64 entry, + uint64_t imm) +{ + if (!insn->mem_only) { + plugin_register_inline_op_on_entry( + &insn->cbs[PLUGIN_CB_INSN][PLUGIN_CB_INLINE], 0, op, entry, imm); + } +} + /* * We always plant memory instrumentation because they don't finalise until @@ -148,7 +172,7 @@ void qemu_plugin_register_vcpu_mem_cb(struct qemu_plugin_insn *insn, void *udata) { plugin_register_vcpu_mem_cb(&insn->cbs[PLUGIN_CB_MEM][PLUGIN_CB_REGULAR], - cb, flags, rw, udata); + cb, flags, rw, udata); } void qemu_plugin_register_vcpu_mem_inline(struct qemu_plugin_insn *insn, @@ -160,6 +184,17 @@ void qemu_plugin_register_vcpu_mem_inline(struct qemu_plugin_insn *insn, rw, op, ptr, imm); } +void qemu_plugin_register_vcpu_mem_inline_per_vcpu( + struct qemu_plugin_insn *insn, + enum qemu_plugin_mem_rw rw, + enum qemu_plugin_op op, + qemu_plugin_u64 entry, + uint64_t imm) +{ + plugin_register_inline_op_on_entry( + &insn->cbs[PLUGIN_CB_MEM][PLUGIN_CB_INLINE], rw, op, entry, imm); +} + void qemu_plugin_register_vcpu_tb_trans_cb(qemu_plugin_id_t id, qemu_plugin_vcpu_tb_trans_cb_t cb) { diff --git a/plugins/core.c b/plugins/core.c index 65d5611f797..7852590da88 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -332,6 +332,23 @@ void plugin_register_inline_op(GArray **arr, dyn_cb->inline_insn.imm = imm; } +void plugin_register_inline_op_on_entry(GArray **arr, + enum qemu_plugin_mem_rw rw, + enum qemu_plugin_op op, + qemu_plugin_u64 entry, + uint64_t imm) +{ + struct qemu_plugin_dyn_cb *dyn_cb; + + dyn_cb = plugin_get_dyn_cb(arr); + dyn_cb->userp = NULL; + dyn_cb->type = PLUGIN_CB_INLINE; + dyn_cb->rw = rw; + dyn_cb->inline_insn.entry = entry; + dyn_cb->inline_insn.op = op; + dyn_cb->inline_insn.imm = imm; +} + void plugin_register_dyn_cb__udata(GArray **arr, qemu_plugin_vcpu_udata_cb_t cb, enum qemu_plugin_cb_flags flags, @@ -480,6 +497,12 @@ void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) char *ptr = cb->userp; size_t elem_size = 0; size_t offset = 0; + if (!ptr) { + /* use inline entry */ + ptr = cb->inline_insn.entry.score->data->data; + elem_size = g_array_get_element_size(cb->inline_insn.entry.score->data); + offset = cb->inline_insn.entry.offset; + } uint64_t *val = (uint64_t *)(ptr + offset + cpu_index * elem_size); switch (cb->inline_insn.op) { diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols index 6204453d0fd..0d8141b85f1 100644 --- a/plugins/qemu-plugins.symbols +++ b/plugins/qemu-plugins.symbols @@ -28,13 +28,16 @@ qemu_plugin_register_vcpu_init_cb; qemu_plugin_register_vcpu_insn_exec_cb; qemu_plugin_register_vcpu_insn_exec_inline; + qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu; qemu_plugin_register_vcpu_mem_cb; qemu_plugin_register_vcpu_mem_inline; + qemu_plugin_register_vcpu_mem_inline_per_vcpu; qemu_plugin_register_vcpu_resume_cb; qemu_plugin_register_vcpu_syscall_cb; qemu_plugin_register_vcpu_syscall_ret_cb; qemu_plugin_register_vcpu_tb_exec_cb; qemu_plugin_register_vcpu_tb_exec_inline; + qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu; qemu_plugin_register_vcpu_tb_trans_cb; qemu_plugin_reset; qemu_plugin_scoreboard_free;