From patchwork Mon Mar 4 13:00:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 777746 Delivered-To: patch@linaro.org Received: by 2002:a5d:4b84:0:b0:33d:f458:43ce with SMTP id b4csp501477wrt; Mon, 4 Mar 2024 05:02:54 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVq6lLBghp58hM+Z7dX8YA1EE8jMG6SUui7CT2QWDvxKqpjaRqYQAJWwHLmREtUnhG+452BKTeSxKAoWLuTaaR2 X-Google-Smtp-Source: AGHT+IHWSxQ/oNRjPPCXOHj3iS0sLs0C5WgHsl93G5UoyFC7dA0aRxWVthamj/m4MoOdaIpShbPy X-Received: by 2002:a05:6359:410b:b0:17b:fb78:4a1 with SMTP id kh11-20020a056359410b00b0017bfb7804a1mr4914005rwc.27.1709557374230; Mon, 04 Mar 2024 05:02:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1709557374; cv=none; d=google.com; s=arc-20160816; b=iT/GNqpygee8JvkXypdC4gS+NCzejbC9lFwC9tg/wEo04ekHiWEHCNUH1QAwDMQHSX mFkQD0kc3LheCcHXLhA/vporKoGg91rBrwQ7RQwPOPefPKBbWbzdH8cTpihVdkh0sIwb tdqqAuO1qMcLkqwnxzUecpdhDh4M2uB4OaCjn9ovE5MpaM4o7TLV/o2yG1pzNSnAjc+u DJf/8rWSuSifN4EwaRE3GZiH9lyW42uRQ8CFMtXkXKvP1YVkZQkD8/+6rncWzUnuCXaj 8vEx1Rbb9A7MNLbQmFK6QdOqrx3wEh5QW8Lmi7Utbf0MvEIhcZYrYOua3Mg7dJnuqsjX FM7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MIZX041RReYggrOD88szc9Tr+OwGhWpNswxH8Yq0yAw=; fh=MDSJphmAaz7z3HiU8dJnBqogMR5Yd8Y7OcCVYt+ujgE=; b=aaxCc+aJFB/0MoucKRZaJClaDfeMVIJx4us5+0b+cbNWURHu5g95c5lfiO16I/EQLZ RQ7oxaNsZTQW6B+hcFeFU+zDRdGDycEQ3apUmEbJ6x8qH+SWJxRUnZ3/mDhZafhhiHIu ia1kxvvuubvdM0ri1euQyAQs3PEL1/2qPoq9O+Jfe3gqmndH5OBzCJkECL2b6zXjYl2p wkvPcb36Xj1RPPEzxO/aIZSGXa53txa/woG9gNvNV2Oswr7Bq3/ODgDvdnQYdq+KTYzy ROeK9Er5taQ/uCPYlryyqO0O/sPHox8QLunrRKa1oGJLeg54PxINU0dlaP9FH/woV9/z DrxA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=r1mRX66T; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o14-20020ac87c4e000000b0042ef5f71d02si1185931qtv.177.2024.03.04.05.02.54 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 04 Mar 2024 05:02:54 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=r1mRX66T; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rh7wV-0001BV-R6; Mon, 04 Mar 2024 08:01:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rh7wP-0000uw-D4 for qemu-devel@nongnu.org; Mon, 04 Mar 2024 08:01:13 -0500 Received: from mail-ej1-x62d.google.com ([2a00:1450:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rh7wN-0000ae-4b for qemu-devel@nongnu.org; Mon, 04 Mar 2024 08:01:12 -0500 Received: by mail-ej1-x62d.google.com with SMTP id a640c23a62f3a-a4499ef8b5aso285957366b.0 for ; Mon, 04 Mar 2024 05:01:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709557269; x=1710162069; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MIZX041RReYggrOD88szc9Tr+OwGhWpNswxH8Yq0yAw=; b=r1mRX66TUPeOxdiAtyKo5xqFuVcRXrUcJcIUwZuXLBSsosKM1i5enEhrUISlFckYbU 3E3xv6g3Jrls7H1cLSAQ8ctVESlJ9Htld9uqIiT14rMcLNRPsPixGOnl/uQlI7U2ATTS s4ijuOvS4mNt+lPkwA2wbTrKK+PXWvrcClNs031+JcjFGGF8f5u8XI6gq4RP86O1vH25 8CvIHnX6Vd/H133Kv1MqUEHYngUccIoi6yABe8uIPE4cFo2wV/LJuAOOOgaYuKvG5cqP VrTR2iljA2OciHuUYFhhL4AYFaC4IiEk9+sOI6sKQHI5Ks0w6nAlqQIarGc+hqZKckRK AAKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709557269; x=1710162069; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MIZX041RReYggrOD88szc9Tr+OwGhWpNswxH8Yq0yAw=; b=SQN/7C5j4M2g54l3nYvzYAJ6kgaYvSgIhB78jyZLX5s2g00JCV+ISI+//OIN7JCMq2 88J+7gcbGpViflXf35ZUJsrB9kwY4LGC6aDkb9LoaIt17L1i4dh5WGvvXuIA22VEugdS BRS/7dqCQAGNzHtD4GUhyx0MCr57JlbxsCmw8zpgMfe3cm1gbPCy0DNLozNeRdk2xh72 3cq7KJdkILX7VTpLfuZoIv5mTJbQC5Eh5OUjy8tk5c0hqlzjVScGZOjuD5SdzfrZwMtP HaVYk9VhzVTeiI7ooxIZ7iA14ip1aEAxx3E5CkYIDkP8DXZax2H33BewN0DGlvyb+3/l 3Rgg== X-Gm-Message-State: AOJu0YxApryUt9jIc5Hfkt/lh1El8lKbxp0vyZLLfRN0HIS8e8bhlTRP xr5UVSMG717LTfMrZpX59sJV3k9UE8l6S8Fhb4kaHGpK2POf94dg5hGIBtQn2S+g26Vb/iiznW0 /Cf8= X-Received: by 2002:a17:906:3e4f:b0:a44:5761:fbd with SMTP id t15-20020a1709063e4f00b00a4457610fbdmr6052710eji.39.1709557268953; Mon, 04 Mar 2024 05:01:08 -0800 (PST) Received: from debian.. ([102.35.208.160]) by smtp.gmail.com with ESMTPSA id tj7-20020a170907c24700b00a413d1eda4bsm4806136ejc.87.2024.03.04.05.01.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Mar 2024 05:01:08 -0800 (PST) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Yanan Wang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Mahmoud Mandour , Pierrick Bouvier , Alexandre Iooss , =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum , Paolo Bonzini Subject: [PATCH v7 03/12] plugins: implement inline operation relative to cpu_index Date: Mon, 4 Mar 2024 17:00:27 +0400 Message-Id: <20240304130036.124418-4-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240304130036.124418-1-pierrick.bouvier@linaro.org> References: <20240304130036.124418-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=pierrick.bouvier@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Instead of working on a fixed memory location, allow to address it based on cpu_index, an element size and a given offset. Result address: ptr + offset + cpu_index * element_size. With this, we can target a member in a struct array from a base pointer. Current semantic is not modified, thus inline operation still targets always the same memory location. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- plugins/plugin.h | 2 +- accel/tcg/plugin-gen.c | 69 ++++++++++++++++++++++++++++++++++-------- plugins/api.c | 3 +- plugins/core.c | 12 +++++--- 4 files changed, 67 insertions(+), 19 deletions(-) diff --git a/plugins/plugin.h b/plugins/plugin.h index 043c740067d..3bf1aaf5c2d 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -99,7 +99,7 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); -void exec_inline_op(struct qemu_plugin_dyn_cb *cb); +void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index); int plugin_num_vcpus(void); diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index ac6b52b9ec9..0f8be53d394 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -133,16 +133,28 @@ static void gen_empty_udata_cb_no_rwg(void) */ static void gen_empty_inline_cb(void) { + TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); + TCGv_ptr cpu_index_as_ptr = tcg_temp_ebb_new_ptr(); TCGv_i64 val = tcg_temp_ebb_new_i64(); TCGv_ptr ptr = tcg_temp_ebb_new_ptr(); + tcg_gen_ld_i32(cpu_index, tcg_env, + -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + /* second operand will be replaced by immediate value */ + tcg_gen_mul_i32(cpu_index, cpu_index, cpu_index); + tcg_gen_ext_i32_ptr(cpu_index_as_ptr, cpu_index); + tcg_gen_movi_ptr(ptr, 0); + tcg_gen_add_ptr(ptr, ptr, cpu_index_as_ptr); tcg_gen_ld_i64(val, ptr, 0); - /* pass an immediate != 0 so that it doesn't get optimized away */ - tcg_gen_addi_i64(val, val, 0xdeadface); + /* second operand will be replaced by immediate value */ + tcg_gen_add_i64(val, val, val); + tcg_gen_st_i64(val, ptr, 0); tcg_temp_free_ptr(ptr); tcg_temp_free_i64(val); + tcg_temp_free_ptr(cpu_index_as_ptr); + tcg_temp_free_i32(cpu_index); } static void gen_empty_mem_cb(TCGv_i64 addr, uint32_t info) @@ -290,12 +302,37 @@ static TCGOp *copy_const_ptr(TCGOp **begin_op, TCGOp *op, void *ptr) return op; } +static TCGOp *copy_ld_i32(TCGOp **begin_op, TCGOp *op) +{ + return copy_op(begin_op, op, INDEX_op_ld_i32); +} + +static TCGOp *copy_ext_i32_ptr(TCGOp **begin_op, TCGOp *op) +{ + if (UINTPTR_MAX == UINT32_MAX) { + op = copy_op(begin_op, op, INDEX_op_mov_i32); + } else { + op = copy_op(begin_op, op, INDEX_op_ext_i32_i64); + } + return op; +} + +static TCGOp *copy_add_ptr(TCGOp **begin_op, TCGOp *op) +{ + if (UINTPTR_MAX == UINT32_MAX) { + op = copy_op(begin_op, op, INDEX_op_add_i32); + } else { + op = copy_op(begin_op, op, INDEX_op_add_i64); + } + return op; +} + static TCGOp *copy_ld_i64(TCGOp **begin_op, TCGOp *op) { if (TCG_TARGET_REG_BITS == 32) { /* 2x ld_i32 */ - op = copy_op(begin_op, op, INDEX_op_ld_i32); - op = copy_op(begin_op, op, INDEX_op_ld_i32); + op = copy_ld_i32(begin_op, op); + op = copy_ld_i32(begin_op, op); } else { /* ld_i64 */ op = copy_op(begin_op, op, INDEX_op_ld_i64); @@ -331,6 +368,13 @@ static TCGOp *copy_add_i64(TCGOp **begin_op, TCGOp *op, uint64_t v) return op; } +static TCGOp *copy_mul_i32(TCGOp **begin_op, TCGOp *op, uint32_t v) +{ + op = copy_op(begin_op, op, INDEX_op_mul_i32); + op->args[2] = tcgv_i32_arg(tcg_constant_i32(v)); + return op; +} + static TCGOp *copy_st_ptr(TCGOp **begin_op, TCGOp *op) { if (UINTPTR_MAX == UINT32_MAX) { @@ -396,18 +440,17 @@ static TCGOp *append_inline_cb(const struct qemu_plugin_dyn_cb *cb, TCGOp *begin_op, TCGOp *op, int *unused) { - /* const_ptr */ - op = copy_const_ptr(&begin_op, op, cb->userp); - - /* ld_i64 */ + char *ptr = cb->userp; + size_t elem_size = 0; + size_t offset = 0; + op = copy_ld_i32(&begin_op, op); + op = copy_mul_i32(&begin_op, op, elem_size); + op = copy_ext_i32_ptr(&begin_op, op); + op = copy_const_ptr(&begin_op, op, ptr + offset); + op = copy_add_ptr(&begin_op, op); op = copy_ld_i64(&begin_op, op); - - /* add_i64 */ op = copy_add_i64(&begin_op, op, cb->inline_insn.imm); - - /* st_i64 */ op = copy_st_i64(&begin_op, op); - return op; } diff --git a/plugins/api.c b/plugins/api.c index f4518a68afe..d8b461bc69c 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -106,7 +106,8 @@ void qemu_plugin_register_vcpu_tb_exec_inline(struct qemu_plugin_tb *tb, void *ptr, uint64_t imm) { if (!tb->mem_only) { - plugin_register_inline_op(&tb->cbs[PLUGIN_CB_INLINE], 0, op, ptr, imm); + plugin_register_inline_op(&tb->cbs[PLUGIN_CB_INLINE], + 0, op, ptr, imm); } } diff --git a/plugins/core.c b/plugins/core.c index 63f4c6c6ce3..65d5611f797 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -318,7 +318,8 @@ static struct qemu_plugin_dyn_cb *plugin_get_dyn_cb(GArray **arr) void plugin_register_inline_op(GArray **arr, enum qemu_plugin_mem_rw rw, - enum qemu_plugin_op op, void *ptr, + enum qemu_plugin_op op, + void *ptr, uint64_t imm) { struct qemu_plugin_dyn_cb *dyn_cb; @@ -474,9 +475,12 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } -void exec_inline_op(struct qemu_plugin_dyn_cb *cb) +void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) { - uint64_t *val = cb->userp; + char *ptr = cb->userp; + size_t elem_size = 0; + size_t offset = 0; + uint64_t *val = (uint64_t *)(ptr + offset + cpu_index * elem_size); switch (cb->inline_insn.op) { case QEMU_PLUGIN_INLINE_ADD_U64: @@ -509,7 +513,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, vaddr, cb->userp); break; case PLUGIN_CB_INLINE: - exec_inline_op(cb); + exec_inline_op(cb, cpu->cpu_index); break; default: g_assert_not_reached();