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Iglesias" , Anton Johansson , Mark Cave-Ayland , Peter Maydell , Zhao Liu , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov , Richard Henderson , Ani Sinha , Bernhard Beschow , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , "Michael S. Tsirkin" , Laszlo Ersek , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 1/5] target/i386/cpu: Expose SMI# IRQ line via QDev Date: Mon, 26 Feb 2024 17:49:08 +0100 Message-ID: <20240226164913.94077-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240226164913.94077-1-philmd@linaro.org> References: <20240226164913.94077-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to remove calls to cpu_interrupt() from hw/ code, expose the SMI# interrupt via QDev as named GPIO. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu-internal.h | 1 + target/i386/cpu-sysemu.c | 11 +++++++++++ target/i386/cpu.c | 2 ++ 3 files changed, 14 insertions(+) diff --git a/target/i386/cpu-internal.h b/target/i386/cpu-internal.h index 9baac5c0b4..9d76bb77cf 100644 --- a/target/i386/cpu-internal.h +++ b/target/i386/cpu-internal.h @@ -62,6 +62,7 @@ GuestPanicInformation *x86_cpu_get_crash_info(CPUState *cs); void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp); +void x86_cpu_smi_irq(void *opaque, int irq, int level); void x86_cpu_apic_create(X86CPU *cpu, Error **errp); void x86_cpu_apic_realize(X86CPU *cpu, Error **errp); void x86_cpu_machine_reset_cb(void *opaque); diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c index 7422096737..7684a7f01e 100644 --- a/target/i386/cpu-sysemu.c +++ b/target/i386/cpu-sysemu.c @@ -370,3 +370,14 @@ void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v, qapi_free_GuestPanicInformation(panic_info); } +void x86_cpu_smi_irq(void *opaque, int irq, int level) +{ + DeviceState *dev = opaque; + CPUState *cs = CPU(dev); + + if (level) { + cpu_interrupt(cs, CPU_INTERRUPT_SMI); + } else { + cpu_reset_interrupt(cs, CPU_INTERRUPT_SMI); + } +} diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7f90823676..6b4462d533 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7463,6 +7463,8 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) } #ifndef CONFIG_USER_ONLY + qdev_init_gpio_in_named(dev, x86_cpu_smi_irq, "SMI", 1); + x86_cpu_apic_realize(cpu, &local_err); if (local_err != NULL) { goto out;