From patchwork Wed Feb 21 08:20:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 774503 Delivered-To: patch@linaro.org Received: by 2002:a5d:6ac2:0:b0:33b:4db1:f5b3 with SMTP id u2csp308500wrw; Wed, 21 Feb 2024 07:28:13 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVpyQEHiFv46+zToxW98PXo5eiRqehe/s1938WPyKDbCeSelokgIeKtOFDWR380RGVEqOU9nXCMAjfLGaVsNKxU X-Google-Smtp-Source: AGHT+IGrgos4pRAv63GtoIgKhIANNqK7Tdes/GuB86scYZhXCEZOz8Q0DgDD7wcBa8nGeFizvipb X-Received: by 2002:a05:6102:2743:b0:470:575a:f4bd with SMTP id p3-20020a056102274300b00470575af4bdmr7883161vsu.28.1708529293114; Wed, 21 Feb 2024 07:28:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1708529293; cv=none; d=google.com; s=arc-20160816; b=DT/o+cycFuMr96NXb+FfwmanBH6KTEW154vvCSqvzKV4mk++t8mbD1S+6u4gaiwvQl OgMCk7Oq4rKOWFAH4v5IZriZ3ifK/xlrBOgR12BNbID/sKXHxbL+bcK+cy2TV7upzTq/ ZOtWRaaEmegQI0DBufvHODQrKtamm/KVPk++eDew5l0f0zFiFeqDTPQIJeQUNyRBKSj+ s59GG61zzh7Atn024UaYd6qStSWDn5lDXmTXAKxI4AMvYKl05ZyIXmdUX/bpP1+/S24N nsko7UyfoL8BDUubNA3jjpjTsId0bBZkzfy4J2bUF5A9rAUfYBzAQKX6ZGG59BZH/m7/ Cgcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=WKydpFTvArTiVl2cNeq7FpXsD2PKC0mLKPv+OOAGlRI=; fh=OKuLB2HSwWuh27MwgB2c3Bd7RFVGc3aSQ8373fc2R0A=; b=rW3LVcTaUg4m7i5PhC/5WdBFqgg04vhypykoRqT0RIPC0i2V58fAeKBnhxZSgTpfz1 JUt/LWypV6vJZFCM6QU/vk2TjAl7EifmTR7R0eP9KyggPoz6tvRBIuqGFhFolpkD7MPY jhMkaj52tpG8ywBDOrUW14tEB5+jxgmQDhCTF/v42GqKca+FJxNv6okZjDm6IYGtGNhJ dDEeLuX66zWTb7mKDo26sSPsMLJJsH5IH6fgco2dGJ7kFRQlI5lFfD3uUFJRG6fifcw5 BE7XpMJfG/whoNR06ZP1lr9uVcEQsQ+5bONf+a6+0p5QeH/51A2Uq+K+7y5NvZwGyUze oPTQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n9-20020a05622a040900b0042c50a318b8si11942008qtx.122.2024.02.21.07.28.12 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 21 Feb 2024 07:28:13 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rcoP3-0004iY-AL; Wed, 21 Feb 2024 10:20:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rcoLX-00010D-1q; Wed, 21 Feb 2024 10:17:30 -0500 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rchuV-0002pC-2R; Wed, 21 Feb 2024 03:25:00 -0500 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id F31754F3EB; Wed, 21 Feb 2024 11:21:22 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id BDD20860CA; Wed, 21 Feb 2024 11:21:01 +0300 (MSK) Received: (nullmailer pid 2142125 invoked by uid 1000); Wed, 21 Feb 2024 08:20:58 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Richard Henderson , Peter Maydell , Gustavo Romero , Michael Tokarev Subject: [Stable-8.2.2 45/60] target/arm: Fix SVE/SME gross MTE suppression checks Date: Wed, 21 Feb 2024 11:20:33 +0300 Message-Id: <20240221082058.2141850-45-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson The TBI and TCMA bits are located within mtedesc, not desc. Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Tested-by: Gustavo Romero Message-id: 20240207025210.8837-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell (cherry picked from commit 855f94eca80c85a99f459e36684ea2f98f6a3243) Signed-off-by: Michael Tokarev diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c index 1ee2690ceb..904bfdac43 100644 --- a/target/arm/tcg/sme_helper.c +++ b/target/arm/tcg/sme_helper.c @@ -573,8 +573,8 @@ void sme_ld1_mte(CPUARMState *env, void *za, uint64_t *vg, desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc = 0; } @@ -750,8 +750,8 @@ void sme_st1_mte(CPUARMState *env, void *za, uint64_t *vg, target_ulong addr, desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc = 0; } diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index f006d152cc..5699dfe667 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -5800,8 +5800,8 @@ void sve_ldN_r_mte(CPUARMState *env, uint64_t *vg, target_ulong addr, desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc = 0; } @@ -6156,8 +6156,8 @@ void sve_ldnfff1_r_mte(CPUARMState *env, void *vg, target_ulong addr, desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc = 0; } @@ -6410,8 +6410,8 @@ void sve_stN_r_mte(CPUARMState *env, uint64_t *vg, target_ulong addr, desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc = 0; }