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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id fb15-20020a056a002d8f00b006e035133b72sm6031559pfb.134.2024.02.12.13.56.06 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Feb 2024 13:56:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH] tcg/arm: Fix goto_tb for large translation blocks Date: Mon, 12 Feb 2024 11:56:04 -1000 Message-Id: <20240212215604.27999-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Correct arithmetic for separating high and low on a large negative number. Fixes: 79ffece4447 ("tcg/arm: Implement direct branch for goto_tb") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1714 Signed-off-by: Richard Henderson Reviewed-by: Michael Tokarev --- tcg/arm/tcg-target.c.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index ffd23ef789..6a04c73c76 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -1771,9 +1771,9 @@ static void tcg_out_goto_tb(TCGContext *s, int which) * shifted immediate from pc. */ int h = -i_disp; - int l = h & 0xfff; + int l = -(h & 0xfff); - h = encode_imm_nofail(h - l); + h = encode_imm_nofail(h + l); tcg_out_dat_imm(s, COND_AL, ARITH_SUB, TCG_REG_R0, TCG_REG_PC, h); tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_R0, l); }