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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id je5-20020a170903264500b001d8a80cbb15sm752059plb.238.2024.02.01.21.55.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Feb 2024 21:55:12 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland Subject: [PULL 41/57] target/sparc: Use i128 for FSQRTq Date: Fri, 2 Feb 2024 15:50:20 +1000 Message-Id: <20240202055036.684176-43-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240202055036.684176-1-richard.henderson@linaro.org> References: <20240202055036.684176-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson Tested-by: Mark Cave-Ayland Acked-by: Mark Cave-Ayland Message-Id: <20231103173841.33651-7-richard.henderson@linaro.org> --- target/sparc/helper.h | 2 +- target/sparc/fop_helper.c | 26 ++++++++++++++++++++++++-- target/sparc/translate.c | 12 +++++++----- 3 files changed, 32 insertions(+), 8 deletions(-) diff --git a/target/sparc/helper.h b/target/sparc/helper.h index 74a1575d21..eea2fa570c 100644 --- a/target/sparc/helper.h +++ b/target/sparc/helper.h @@ -43,7 +43,7 @@ DEF_HELPER_FLAGS_3(fcmps, TCG_CALL_NO_WG, tl, env, f32, f32) DEF_HELPER_FLAGS_3(fcmpd, TCG_CALL_NO_WG, tl, env, f64, f64) DEF_HELPER_FLAGS_3(fcmpes, TCG_CALL_NO_WG, tl, env, f32, f32) DEF_HELPER_FLAGS_3(fcmped, TCG_CALL_NO_WG, tl, env, f64, f64) -DEF_HELPER_FLAGS_1(fsqrtq, TCG_CALL_NO_RWG, void, env) +DEF_HELPER_FLAGS_2(fsqrtq, TCG_CALL_NO_RWG, i128, env, i128) DEF_HELPER_FLAGS_1(fcmpq, TCG_CALL_NO_WG, tl, env) DEF_HELPER_FLAGS_1(fcmpeq, TCG_CALL_NO_WG, tl, env) #ifdef TARGET_SPARC64 diff --git a/target/sparc/fop_helper.c b/target/sparc/fop_helper.c index d6fb769769..d639e50965 100644 --- a/target/sparc/fop_helper.c +++ b/target/sparc/fop_helper.c @@ -26,6 +26,28 @@ #define QT0 (env->qt0) #define QT1 (env->qt1) +static inline float128 f128_in(Int128 i) +{ + union { + Int128 i; + float128 f; + } u; + + u.i = i; + return u.f; +} + +static inline Int128 f128_ret(float128 f) +{ + union { + Int128 i; + float128 f; + } u; + + u.f = f; + return u.i; +} + static target_ulong do_check_ieee_exceptions(CPUSPARCState *env, uintptr_t ra) { target_ulong status = get_float_exception_flags(&env->fp_status); @@ -222,9 +244,9 @@ float64 helper_fsqrtd(CPUSPARCState *env, float64 src) return float64_sqrt(src, &env->fp_status); } -void helper_fsqrtq(CPUSPARCState *env) +Int128 helper_fsqrtq(CPUSPARCState *env, Int128 src) { - QT0 = float128_sqrt(QT1, &env->fp_status); + return f128_ret(float128_sqrt(f128_in(src), &env->fp_status)); } #define GEN_FCMP(name, size, reg1, reg2, FS, E) \ diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 41952281dc..ca98565c16 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -4669,8 +4669,10 @@ TRANS(FNEGq, 64, do_qq, a, gen_op_fnegq) TRANS(FABSq, 64, do_qq, a, gen_op_fabsq) static bool do_env_qq(DisasContext *dc, arg_r_r *a, - void (*func)(TCGv_env)) + void (*func)(TCGv_i128, TCGv_env, TCGv_i128)) { + TCGv_i128 t; + if (gen_trap_ifnofpu(dc)) { return true; } @@ -4679,11 +4681,11 @@ static bool do_env_qq(DisasContext *dc, arg_r_r *a, } gen_op_clear_ieee_excp_and_FTT(); - gen_op_load_fpr_QT1(QFPREG(a->rs)); - func(tcg_env); + + t = gen_load_fpr_Q(dc, a->rs); + func(t, tcg_env, t); gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env); - gen_op_store_QT0_fpr(QFPREG(a->rd)); - gen_update_fprs_dirty(dc, QFPREG(a->rd)); + gen_store_fpr_Q(dc, a->rd, t); return advance_pc(dc); }