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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Pavel Dovgalyuk Subject: [PULL 28/31] target/i386: Extract x86_need_replay_interrupt() from accel/tcg/ Date: Tue, 30 Jan 2024 09:01:18 +1000 Message-Id: <20240129230121.8091-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Move this x86-specific code out of the generic accel/tcg/. Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Reviewed-by: Pavel Dovgalyuk Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240124101639.30056-8-philmd@linaro.org> Signed-off-by: Richard Henderson --- target/i386/tcg/helper-tcg.h | 1 + accel/tcg/cpu-exec.c | 4 ---- target/i386/tcg/sysemu/seg_helper.c | 10 ++++++++++ target/i386/tcg/tcg-cpu.c | 1 + 4 files changed, 12 insertions(+), 4 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index ce34b737bb..253b1f561e 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -39,6 +39,7 @@ QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS); */ void x86_cpu_do_interrupt(CPUState *cpu); #ifndef CONFIG_USER_ONLY +bool x86_need_replay_interrupt(int interrupt_request); bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); #endif diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 34d10eb173..2eacd694ea 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -773,13 +773,9 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) */ static inline bool need_replay_interrupt(CPUState *cpu, int interrupt_request) { -#if defined(TARGET_I386) - return !(interrupt_request & CPU_INTERRUPT_POLL); -#else const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; return !tcg_ops->need_replay_interrupt || tcg_ops->need_replay_interrupt(interrupt_request); -#endif } #endif /* !CONFIG_USER_ONLY */ diff --git a/target/i386/tcg/sysemu/seg_helper.c b/target/i386/tcg/sysemu/seg_helper.c index 1cb5a0db45..e6f42282bb 100644 --- a/target/i386/tcg/sysemu/seg_helper.c +++ b/target/i386/tcg/sysemu/seg_helper.c @@ -127,6 +127,16 @@ void x86_cpu_do_interrupt(CPUState *cs) } } +bool x86_need_replay_interrupt(int interrupt_request) +{ + /* + * CPU_INTERRUPT_POLL is a virtual event which gets converted into a + * "real" interrupt event later. It does not need to be recorded for + * replay purposes. + */ + return !(interrupt_request & CPU_INTERRUPT_POLL); +} + bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { X86CPU *cpu = X86_CPU(cs); diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 8e148e9bc4..5bdcf45199 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -123,6 +123,7 @@ static const TCGCPUOps x86_tcg_ops = { .do_unaligned_access = x86_cpu_do_unaligned_access, .debug_excp_handler = breakpoint_handler, .debug_check_breakpoint = x86_debug_check_breakpoint, + .need_replay_interrupt = x86_need_replay_interrupt, #endif /* !CONFIG_USER_ONLY */ };