From patchwork Fri Jan 19 11:34:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 763914 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a08:0:b0:337:62d3:c6d5 with SMTP id m8csp398724wrq; Fri, 19 Jan 2024 03:41:01 -0800 (PST) X-Google-Smtp-Source: AGHT+IH9B5bZZsgXDOW213YOosHD3cAbFQ0qpFedeKlzTIPkRuQTLH0zVQvzt5vZIu/1GOgm8k6y X-Received: by 2002:a81:6941:0:b0:5f8:cf76:e571 with SMTP id e62-20020a816941000000b005f8cf76e571mr2182544ywc.93.1705664460916; Fri, 19 Jan 2024 03:41:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705664460; cv=none; d=google.com; s=arc-20160816; b=gmilwvt9gEUERJmeLZhkKZYONz2j42OCNTzVIFHZBzOils6KJJX3CUvIDliqKJEfYV wZs6BHHIqCNAS/ZKuMTuMhwZQ6HxkOhxNv6c/T9Q1VtU7Brq67+92ESKDkajQHnx3KMe 2fAakapwdzIailP7np7YFbLIWGOP6SkekVwIWJRQfaBl9oDwl1xArO1Zr4Kt5yo0pFEu Tvn1XeRnMhsWNcsKSRJrKvkPQZlogvcrQ6GpQQeJA27l9nuF1KfBfLvcXHmkLE/DIHLd YLXeTPMx2ZH1Thq2R93HQA83ITN7NsUqlum3H4ENt/HB+e6KefL+2hHzE3EBhmdhXmMz 8umg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1bDfprnFlfsfXltzGvRi/dALsYabn5U/Cj2d9HyuVIo=; fh=H3gzWMxIGcYpnCV3e2JUJoIjDrs6lUKJhouF472DiR4=; b=TVyF+0kkWu3gjdFYZn3a/rJn2xNCPOcNjZ7xy3iZ8mhQhdE4VoD/MHqN0f/8nNHiZS +0fzX3va9i5orvFSuRQT2gTAndm3ZZ2pRo4pUL98f2ady3Rn2n3yEiUbGAg/gUNPYcm8 kIdjaKb2HknnT221d3C0TDx10NtLCM6ZnZLLC87ax12q/VSSfoE2HNQ6zRCSr/0ZqbYl vtOPq4ApqxUFfP8cWbE5pzf2O+V2yYKYQjWcuRKus0sMyaFw7ANG4e/AzIXZ8f0/xfkW BEtHarRhqDC6XFi2ClUvTm3IRf1oXwr8x3A1oDAkq1XBpFWq7XUi3oGPzuMJwU+NFgQY vHDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h8Cubpe3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l10-20020a05622a174a00b0042a0bbc5c1esi6527973qtk.767.2024.01.19.03.41.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 19 Jan 2024 03:41:00 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h8Cubpe3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rQnAz-0003lZ-FD; Fri, 19 Jan 2024 06:36:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rQnAx-0003fM-0j for qemu-devel@nongnu.org; Fri, 19 Jan 2024 06:36:43 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rQnAu-0002pq-IN for qemu-devel@nongnu.org; Fri, 19 Jan 2024 06:36:42 -0500 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-40e7065b7bdso7085905e9.3 for ; Fri, 19 Jan 2024 03:36:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705664199; x=1706268999; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1bDfprnFlfsfXltzGvRi/dALsYabn5U/Cj2d9HyuVIo=; b=h8Cubpe3S+tE5+65/G+uhpZUJZLKVVUWbQtT7wwtTUQU8OABdqnMF21STV8TgzMTpB rBu0Yw70GRw+koXNthMmD0slIs2cpNk1bx1Z6piK+XnCu7QVOkePmoZDtD1Y/yITHeP5 WGg9hyDWmxdZ4xp4OK4kvEUukDAFbULe0TaB+ZKRk/97DYW4mtzUt1g9vDdUEFrIamVD N6ZFAg21BybvJr4vYURmHTc+q60KpAPaaPJ4Luu/Wp7EtXNkU8DrF08eMF+F0wYKAdGb U3MIzOUkzMgjAyiqli23ybmxb8XpJ5K0GtbCn/raYcz5YQCwPkLTkvTGNW2iWdvDY2VK Pf1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705664199; x=1706268999; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1bDfprnFlfsfXltzGvRi/dALsYabn5U/Cj2d9HyuVIo=; b=pLJORAzt24QFsxUMoTbHvb2VO/jF7LotldOwt1UQwcykoMi1tmT1d8PPQhEBMlbjdu hrE3g+aB60KHfUBIJ5ECkMy/SWC9jlhRHjN7KCLPn3jPMDsFg009E4QTuvTmw29PWQd9 PL9yYlydZ754c5d2/TCX/Fw3LZFiUDj2IpUkulSyIyu3ZFjpQ4GwShEMfJkIA3oOKkZN g/14EGXKA8KSjYh5W4IpGdkbl7GrRQRnJ5AHa5D/2VtkR9KytlYnCyyGfW1koWk48ehE 3iGFHGDVSYIZsImsaLpIKmLcpdnLJ4y5auanNkENbNnbMpe1x5NnIxT+iLuf8gAZ3TLy gp+Q== X-Gm-Message-State: AOJu0Yxv2Hktgyz2Rl9lhn53MxjB29FNMi/ngpR3ySutGV7FsuJSMPZH QD9GFi2c/u1j/oLDpGc033VvjKXrnfu0YP8zO+4/w2Rjq0eCgIXhIK9iXSE14IhBTZCjR0Nyeci dxX+1yg== X-Received: by 2002:a05:600c:4313:b0:40d:94da:ff40 with SMTP id p19-20020a05600c431300b0040d94daff40mr912937wme.195.1705664198876; Fri, 19 Jan 2024 03:36:38 -0800 (PST) Received: from localhost.localdomain (91-163-26-170.subs.proxad.net. [91.163.26.170]) by smtp.gmail.com with ESMTPSA id h5-20020a05600c314500b0040e5e21cd7bsm28384501wmo.11.2024.01.19.03.36.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jan 2024 03:36:38 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, Gerd Hoffmann , =?utf-8?q?Philippe_?= =?utf-8?q?Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz Subject: [PULL 20/36] hw/pflash: implement update buffer for block writes Date: Fri, 19 Jan 2024 12:34:49 +0100 Message-ID: <20240119113507.31951-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240119113507.31951-1-philmd@linaro.org> References: <20240119113507.31951-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Gerd Hoffmann Add an update buffer where all block updates are staged. Flush or discard updates properly, so we should never see half-completed block writes in pflash storage. Drop a bunch of FIXME comments ;) Signed-off-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240108160900.104835-4-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/block/pflash_cfi01.c | 110 ++++++++++++++++++++++++++++++---------- hw/block/pflash_cfi02.c | 2 +- hw/block/trace-events | 7 ++- 3 files changed, 89 insertions(+), 30 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 8434a45cab..f956f8bcf7 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -80,16 +80,39 @@ struct PFlashCFI01 { uint16_t ident3; uint8_t cfi_table[0x52]; uint64_t counter; - unsigned int writeblock_size; + uint32_t writeblock_size; MemoryRegion mem; char *name; void *storage; VMChangeStateEntry *vmstate; bool old_multiple_chip_handling; + + /* block update buffer */ + unsigned char *blk_bytes; + uint32_t blk_offset; }; static int pflash_post_load(void *opaque, int version_id); +static bool pflash_blk_write_state_needed(void *opaque) +{ + PFlashCFI01 *pfl = opaque; + + return (pfl->blk_offset != -1); +} + +static const VMStateDescription vmstate_pflash_blk_write = { + .name = "pflash_cfi01_blk_write", + .version_id = 1, + .minimum_version_id = 1, + .needed = pflash_blk_write_state_needed, + .fields = (const VMStateField[]) { + VMSTATE_VBUFFER_UINT32(blk_bytes, PFlashCFI01, 0, NULL, writeblock_size), + VMSTATE_UINT32(blk_offset, PFlashCFI01), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_pflash = { .name = "pflash_cfi01", .version_id = 1, @@ -101,6 +124,10 @@ static const VMStateDescription vmstate_pflash = { VMSTATE_UINT8(status, PFlashCFI01), VMSTATE_UINT64(counter, PFlashCFI01), VMSTATE_END_OF_LIST() + }, + .subsections = (const VMStateDescription * const []) { + &vmstate_pflash_blk_write, + NULL } }; @@ -376,13 +403,55 @@ static void pflash_update(PFlashCFI01 *pfl, int offset, } } +/* copy current flash content to block update buffer */ +static void pflash_blk_write_start(PFlashCFI01 *pfl, hwaddr offset) +{ + hwaddr mask = ~(pfl->writeblock_size - 1); + + trace_pflash_write_block_start(pfl->name, pfl->counter); + pfl->blk_offset = offset & mask; + memcpy(pfl->blk_bytes, pfl->storage + pfl->blk_offset, + pfl->writeblock_size); +} + +/* commit block update buffer changes */ +static void pflash_blk_write_flush(PFlashCFI01 *pfl) +{ + g_assert(pfl->blk_offset != -1); + trace_pflash_write_block_flush(pfl->name); + memcpy(pfl->storage + pfl->blk_offset, pfl->blk_bytes, + pfl->writeblock_size); + pflash_update(pfl, pfl->blk_offset, pfl->writeblock_size); + pfl->blk_offset = -1; +} + +/* discard block update buffer changes */ +static void pflash_blk_write_abort(PFlashCFI01 *pfl) +{ + trace_pflash_write_block_abort(pfl->name); + pfl->blk_offset = -1; +} + static inline void pflash_data_write(PFlashCFI01 *pfl, hwaddr offset, uint32_t value, int width, int be) { uint8_t *p; - trace_pflash_data_write(pfl->name, offset, width, value, pfl->counter); - p = pfl->storage + offset; + if (pfl->blk_offset != -1) { + /* block write: redirect writes to block update buffer */ + if ((offset < pfl->blk_offset) || + (offset + width > pfl->blk_offset + pfl->writeblock_size)) { + pfl->status |= 0x10; /* Programming error */ + return; + } + trace_pflash_data_write_block(pfl->name, offset, width, value, + pfl->counter); + p = pfl->blk_bytes + (offset - pfl->blk_offset); + } else { + /* write directly to storage */ + trace_pflash_data_write(pfl->name, offset, width, value); + p = pfl->storage + offset; + } if (be) { stn_be_p(p, width, value); @@ -503,9 +572,9 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset, } else { value = extract32(value, 0, pfl->bank_width * 8); } - trace_pflash_write_block(pfl->name, value); pfl->counter = value; pfl->wcycle++; + pflash_blk_write_start(pfl, offset); break; case 0x60: if (cmd == 0xd0) { @@ -536,12 +605,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset, switch (pfl->cmd) { case 0xe8: /* Block write */ /* FIXME check @offset, @width */ - if (!pfl->ro) { - /* - * FIXME writing straight to memory is *wrong*. We - * should write to a buffer, and flush it to memory - * only on confirm command (see below). - */ + if (!pfl->ro && (pfl->blk_offset != -1)) { pflash_data_write(pfl, offset, value, width, be); } else { pfl->status |= 0x10; /* Programming error */ @@ -550,18 +614,8 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset, pfl->status |= 0x80; if (!pfl->counter) { - hwaddr mask = pfl->writeblock_size - 1; - mask = ~mask; - trace_pflash_write(pfl->name, "block write finished"); pfl->wcycle++; - if (!pfl->ro) { - /* Flush the entire write buffer onto backing storage. */ - /* FIXME premature! */ - pflash_update(pfl, offset & mask, pfl->writeblock_size); - } else { - pfl->status |= 0x10; /* Programming error */ - } } pfl->counter--; @@ -573,20 +627,17 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset, case 3: /* Confirm mode */ switch (pfl->cmd) { case 0xe8: /* Block write */ - if (cmd == 0xd0) { - /* FIXME this is where we should write out the buffer */ + if ((cmd == 0xd0) && !(pfl->status & 0x10)) { + pflash_blk_write_flush(pfl); pfl->wcycle = 0; pfl->status |= 0x80; } else { - qemu_log_mask(LOG_UNIMP, - "%s: Aborting write to buffer not implemented," - " the data is already written to storage!\n" - "Flash device reset into READ mode.\n", - __func__); + pflash_blk_write_abort(pfl); goto mode_read_array; } break; default: + pflash_blk_write_abort(pfl); goto error_flash; } break; @@ -820,6 +871,9 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) pfl->cmd = 0x00; pfl->status = 0x80; /* WSM ready */ pflash_cfi01_fill_cfi_table(pfl); + + pfl->blk_bytes = g_malloc(pfl->writeblock_size); + pfl->blk_offset = -1; } static void pflash_cfi01_system_reset(DeviceState *dev) @@ -839,6 +893,8 @@ static void pflash_cfi01_system_reset(DeviceState *dev) * This model deliberately ignores this delay. */ pfl->status = 0x80; + + pfl->blk_offset = -1; } static Property pflash_cfi01_properties[] = { diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 2a99b286b0..6fa56f14c0 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -546,7 +546,7 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, } goto reset_flash; } - trace_pflash_data_write(pfl->name, offset, width, value, 0); + trace_pflash_data_write(pfl->name, offset, width, value); if (!pfl->ro) { p = (uint8_t *)pfl->storage + offset; if (pfl->be) { diff --git a/hw/block/trace-events b/hw/block/trace-events index bab21d3a1c..cc9a9f2460 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -12,7 +12,8 @@ fdctrl_tc_pulse(int level) "TC pulse: %u" pflash_chip_erase_invalid(const char *name, uint64_t offset) "%s: chip erase: invalid address 0x%" PRIx64 pflash_chip_erase_start(const char *name) "%s: start chip erase" pflash_data_read(const char *name, uint64_t offset, unsigned size, uint32_t value) "%s: data offset:0x%04"PRIx64" size:%u value:0x%04x" -pflash_data_write(const char *name, uint64_t offset, unsigned size, uint32_t value, uint64_t counter) "%s: data offset:0x%04"PRIx64" size:%u value:0x%04x counter:0x%016"PRIx64 +pflash_data_write(const char *name, uint64_t offset, unsigned size, uint32_t value) "%s: data offset:0x%04"PRIx64" size:%u value:0x%04x" +pflash_data_write_block(const char *name, uint64_t offset, unsigned size, uint32_t value, uint64_t counter) "%s: data offset:0x%04"PRIx64" size:%u value:0x%04x counter:0x%016"PRIx64 pflash_device_id(const char *name, uint16_t id) "%s: read device ID: 0x%04x" pflash_device_info(const char *name, uint64_t offset) "%s: read device information offset:0x%04" PRIx64 pflash_erase_complete(const char *name) "%s: sector erase complete" @@ -32,7 +33,9 @@ pflash_unlock0_failed(const char *name, uint64_t offset, uint8_t cmd, uint16_t a pflash_unlock1_failed(const char *name, uint64_t offset, uint8_t cmd) "%s: unlock0 failed 0x%" PRIx64 " 0x%02x" pflash_unsupported_device_configuration(const char *name, uint8_t width, uint8_t max) "%s: unsupported device configuration: device_width:%d max_device_width:%d" pflash_write(const char *name, const char *str) "%s: %s" -pflash_write_block(const char *name, uint32_t value) "%s: block write: bytes:0x%x" +pflash_write_block_start(const char *name, uint32_t value) "%s: block write start: bytes:0x%x" +pflash_write_block_flush(const char *name) "%s: block write flush" +pflash_write_block_abort(const char *name) "%s: block write abort" pflash_write_block_erase(const char *name, uint64_t offset, uint64_t len) "%s: block erase offset:0x%" PRIx64 " bytes:0x%" PRIx64 pflash_write_failed(const char *name, uint64_t offset, uint8_t cmd) "%s: command failed 0x%" PRIx64 " 0x%02x" pflash_write_invalid(const char *name, uint8_t cmd) "%s: invalid write for command 0x%02x"