@@ -36,6 +36,12 @@ DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU,
#define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU
#define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX)
+/* Meanings of the ARMCPU object's four inbound GPIO lines */
+#define ARM_CPU_IRQ 0
+#define ARM_CPU_FIQ 1
+#define ARM_CPU_VIRQ 2
+#define ARM_CPU_VFIQ 3
+
/* For M profile, some registers are banked secure vs non-secure;
* these are represented as a 2-element array where the first element
* is the non-secure copy and the second is the secure copy.
@@ -93,12 +93,6 @@
#define offsetofhigh32(S, M) (offsetof(S, M) + sizeof(uint32_t))
#endif
-/* Meanings of the ARMCPU object's four inbound GPIO lines */
-#define ARM_CPU_IRQ 0
-#define ARM_CPU_FIQ 1
-#define ARM_CPU_VIRQ 2
-#define ARM_CPU_VFIQ 3
-
/* ARM-specific extra insn start words:
* 1: Conditional execution bits
* 2: Partial exception syndrome for data aborts
@@ -26,6 +26,7 @@
#include "hw/boards.h"
#include "hw/usb/hcd-ohci.h"
#include "hw/loader.h"
+#include "target/arm/cpu-qom.h"
#define AW_A10_SRAM_A_BASE 0x00000000
#define AW_A10_DRAMC_BASE 0x01c01000
@@ -30,6 +30,7 @@
#include "hw/loader.h"
#include "sysemu/sysemu.h"
#include "hw/arm/allwinner-h3.h"
+#include "target/arm/cpu-qom.h"
/* Memory map */
const hwaddr allwinner_h3_memmap[] = {
@@ -32,6 +32,7 @@
#include "sysemu/sysemu.h"
#include "hw/arm/allwinner-r40.h"
#include "hw/misc/allwinner-r40-dramc.h"
+#include "target/arm/cpu-qom.h"
/* Memory map */
const hwaddr allwinner_r40_memmap[] = {
@@ -23,6 +23,7 @@
#include "target/arm/idau.h"
#include "target/arm/cpu.h"
#include "target/arm/cpu-features.h"
+#include "target/arm/cpu-qom.h"
#include "migration/vmstate.h"
/* Bitbanded IO. Each word corresponds to a single bit. */
@@ -21,6 +21,7 @@
#include "hw/i2c/aspeed_i2c.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
+#include "target/arm/cpu-qom.h"
#define ASPEED_SOC_IOMEM_SIZE 0x00200000
@@ -16,6 +16,7 @@
#include "hw/i2c/aspeed_i2c.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
+#include "target/arm/cpu-qom.h"
#define ASPEED_SOC_IOMEM_SIZE 0x00200000
#define ASPEED_SOC_DPMCU_SIZE 0x00040000
@@ -15,6 +15,7 @@
#include "hw/arm/bcm2836.h"
#include "hw/arm/raspi_platform.h"
#include "hw/sysbus.h"
+#include "target/arm/cpu-qom.h"
struct BCM283XClass {
/*< private >*/
@@ -36,6 +36,7 @@
#include "hw/arm/exynos4210.h"
#include "hw/sd/sdhci.h"
#include "hw/usb/hcd-ehci.h"
+#include "target/arm/cpu-qom.h"
#define EXYNOS4210_CHIPID_ADDR 0x10000000
@@ -28,6 +28,7 @@
#include "sysemu/sysemu.h"
#include "hw/qdev-properties.h"
#include "chardev/char.h"
+#include "target/arm/cpu-qom.h"
#define IMX25_ESDHC_CAPABILITIES 0x07e20000
@@ -26,6 +26,7 @@
#include "exec/address-spaces.h"
#include "hw/qdev-properties.h"
#include "chardev/char.h"
+#include "target/arm/cpu-qom.h"
static void fsl_imx31_init(Object *obj)
{
@@ -29,6 +29,7 @@
#include "chardev/char.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "target/arm/cpu-qom.h"
#define IMX6_ESDHC_CAPABILITIES 0x057834b4
@@ -25,6 +25,7 @@
#include "sysemu/sysemu.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "target/arm/cpu-qom.h"
#define NAME_SIZE 20
@@ -26,6 +26,7 @@
#include "sysemu/sysemu.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "target/arm/cpu-qom.h"
#define NAME_SIZE 20
@@ -36,6 +36,7 @@
#include "qemu/log.h"
#include "qom/object.h"
#include "cpu.h"
+#include "target/arm/cpu-qom.h"
#define SMP_BOOT_ADDR 0x100
#define SMP_BOOT_REG 0x40
@@ -28,6 +28,7 @@
#include "hw/sd/sd.h"
#include "qom/object.h"
#include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
#define TYPE_INTEGRATOR_CM "integrator_core"
OBJECT_DECLARE_SIMPLE_TYPE(IntegratorCMState, INTEGRATOR_CM)
@@ -39,6 +39,7 @@
#include "hw/net/mv88w8618_eth.h"
#include "audio/audio.h"
#include "qemu/error-report.h"
+#include "target/arm/cpu-qom.h"
#define MP_MISC_BASE 0x80002000
#define MP_MISC_SIZE 0x00001000
@@ -26,6 +26,7 @@
#include "qapi/error.h"
#include "qemu/units.h"
#include "sysemu/sysemu.h"
+#include "target/arm/cpu-qom.h"
/*
* This covers the whole MMIO space. We'll use this to catch any MMIO accesses
@@ -40,6 +40,7 @@
#include "hw/sysbus.h"
#include "qemu/cutils.h"
#include "qemu/bcd.h"
+#include "target/arm/cpu-qom.h"
static inline void omap_log_badwidth(const char *funcname, hwaddr addr, int sz)
{
@@ -39,6 +39,7 @@
#include "hw/sysbus.h"
#include "hw/boards.h"
#include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
/* Enhanced Audio Controller (CODEC only) */
struct omap_eac_s {
@@ -30,6 +30,7 @@
#include "hw/i2c/arm_sbcon_i2c.h"
#include "hw/sd/sd.h"
#include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
#define SMP_BOOT_ADDR 0xe0000000
#define SMP_BOOTREG_ADDR 0x10000030
@@ -50,6 +50,7 @@
#include "net/net.h"
#include "qapi/qmp/qlist.h"
#include "qom/object.h"
+#include "target/arm/cpu-qom.h"
#define RAMLIMIT_GB 8192
#define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB)
@@ -46,6 +46,7 @@
#include "qemu/cutils.h"
#include "qemu/log.h"
#include "qom/object.h"
+#include "target/arm/cpu-qom.h"
//#define DEBUG
@@ -27,6 +27,7 @@
#include "hw/sd/sd.h"
#include "qom/object.h"
#include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
#define VERSATILE_FLASH_ADDR 0x34000000
#define VERSATILE_FLASH_SIZE (64 * 1024 * 1024)
@@ -46,6 +46,7 @@
#include "qapi/qmp/qlist.h"
#include "qom/object.h"
#include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
#define VEXPRESS_BOARD_ID 0x8e0
#define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024)
@@ -73,6 +73,7 @@
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
#include "hw/acpi/acpi.h"
+#include "target/arm/cpu-qom.h"
#include "target/arm/internals.h"
#include "target/arm/multiprocessing.h"
#include "hw/mem/pc-dimm.h"
@@ -38,6 +38,7 @@
#include "sysemu/reset.h"
#include "qom/object.h"
#include "exec/tswap.h"
+#include "target/arm/cpu-qom.h"
#define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
@@ -23,6 +23,7 @@
#include "hw/misc/unimp.h"
#include "hw/arm/xlnx-versal.h"
#include "qemu/log.h"
+#include "target/arm/cpu-qom.h"
#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
@@ -25,6 +25,7 @@
#include "sysemu/kvm.h"
#include "sysemu/sysemu.h"
#include "kvm_arm.h"
+#include "target/arm/cpu-qom.h"
#define GIC_NUM_SPI_INTR 160
@@ -48,6 +48,7 @@
#include "disas/capstone.h"
#include "fpu/softfloat.h"
#include "cpregs.h"
+#include "target/arm/cpu-qom.h"
static void arm_cpu_set_pc(CPUState *cs, vaddr value)
{
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init() handler. To allow non-ARM code to raise interrupt on ARM cores, move they to 'target/arm/cpu-qom.h' which is non-ARM specific and can be included by any hw/ file. File list to include the new header generated using: $ git grep -wEl 'ARM_CPU_(\w*IRQ|FIQ)' Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/arm/cpu-qom.h | 6 ++++++ target/arm/cpu.h | 6 ------ hw/arm/allwinner-a10.c | 1 + hw/arm/allwinner-h3.c | 1 + hw/arm/allwinner-r40.c | 1 + hw/arm/armv7m.c | 1 + hw/arm/aspeed_ast2400.c | 1 + hw/arm/aspeed_ast2600.c | 1 + hw/arm/bcm2836.c | 1 + hw/arm/exynos4210.c | 1 + hw/arm/fsl-imx25.c | 1 + hw/arm/fsl-imx31.c | 1 + hw/arm/fsl-imx6.c | 1 + hw/arm/fsl-imx6ul.c | 1 + hw/arm/fsl-imx7.c | 1 + hw/arm/highbank.c | 1 + hw/arm/integratorcp.c | 1 + hw/arm/musicpal.c | 1 + hw/arm/npcm7xx.c | 1 + hw/arm/omap1.c | 1 + hw/arm/omap2.c | 1 + hw/arm/realview.c | 1 + hw/arm/sbsa-ref.c | 1 + hw/arm/strongarm.c | 1 + hw/arm/versatilepb.c | 1 + hw/arm/vexpress.c | 1 + hw/arm/virt.c | 1 + hw/arm/xilinx_zynq.c | 1 + hw/arm/xlnx-versal.c | 1 + hw/arm/xlnx-zynqmp.c | 1 + target/arm/cpu.c | 1 + 31 files changed, 35 insertions(+), 6 deletions(-)