@@ -1173,6 +1173,11 @@ void arm_cpu_post_init(Object *obj);
uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz);
+static inline uint64_t arm_cpu_mp_affinity(ARMCPU *cpu)
+{
+ return cpu->mp_affinity;
+}
+
#ifndef CONFIG_USER_ONLY
extern const VMStateDescription vmstate_arm_cpu;
@@ -720,7 +720,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
build_append_int_noprefix(table_data, vgic_interrupt, 4);
build_append_int_noprefix(table_data, 0, 8); /* GICR Base Address*/
/* MPIDR */
- build_append_int_noprefix(table_data, armcpu->mp_affinity, 8);
+ build_append_int_noprefix(table_data, arm_cpu_mp_affinity(armcpu), 8);
/* Processor Power Efficiency Class */
build_append_int_noprefix(table_data, 0, 1);
/* Reserved */
@@ -370,7 +370,7 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms)
for (cpu = 0; cpu < smp_cpus; cpu++) {
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu));
- if (armcpu->mp_affinity & ARM_AFF3_MASK) {
+ if (arm_cpu_mp_affinity(armcpu) & ARM_AFF3_MASK) {
addr_cells = 2;
break;
}
@@ -397,10 +397,10 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms)
if (addr_cells == 2) {
qemu_fdt_setprop_u64(ms->fdt, nodename, "reg",
- armcpu->mp_affinity);
+ arm_cpu_mp_affinity(armcpu));
} else {
qemu_fdt_setprop_cell(ms->fdt, nodename, "reg",
- armcpu->mp_affinity);
+ arm_cpu_mp_affinity(armcpu));
}
if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) {
@@ -107,7 +107,8 @@ static void fdt_add_cpu_nodes(VersalVirt *s, uint32_t psci_conduit)
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(i));
qemu_fdt_add_subnode(s->fdt, name);
- qemu_fdt_setprop_cell(s->fdt, name, "reg", armcpu->mp_affinity);
+ qemu_fdt_setprop_cell(s->fdt, name, "reg",
+ arm_cpu_mp_affinity(armcpu));
if (psci_conduit != QEMU_PSCI_CONDUIT_DISABLED) {
qemu_fdt_setprop_string(s->fdt, name, "enable-method", "psci");
}
@@ -67,9 +67,9 @@ static void crl_reset_cpu(XlnxVersalCRL *s, ARMCPU *armcpu,
bool rst_old, bool rst_new)
{
if (rst_new) {
- arm_set_cpu_off(armcpu->mp_affinity);
+ arm_set_cpu_off(arm_cpu_mp_affinity(armcpu));
} else {
- arm_set_cpu_on_and_reset(armcpu->mp_affinity);
+ arm_set_cpu_on_and_reset(arm_cpu_mp_affinity(armcpu));
}
}
@@ -37,7 +37,7 @@ CPUState *arm_get_cpu_by_id(uint64_t id)
CPU_FOREACH(cpu) {
ARMCPU *armcpu = ARM_CPU(cpu);
- if (armcpu->mp_affinity == id) {
+ if (arm_cpu_mp_affinity(armcpu) == id) {
return cpu;
}
}
@@ -1016,7 +1016,7 @@ static void hvf_raise_exception(CPUState *cpu, uint32_t excp,
static void hvf_psci_cpu_off(ARMCPU *arm_cpu)
{
- int32_t ret = arm_set_cpu_off(arm_cpu->mp_affinity);
+ int32_t ret = arm_set_cpu_off(arm_cpu_mp_affinity(arm_cpu));
assert(ret == QEMU_ARM_POWERCTL_RET_SUCCESS);
}
@@ -1045,7 +1045,7 @@ static bool hvf_handle_psci_call(CPUState *cpu)
int32_t ret = 0;
trace_hvf_psci_call(param[0], param[1], param[2], param[3],
- arm_cpu->mp_affinity);
+ arm_cpu_mp_affinity(arm_cpu));
switch (param[0]) {
case QEMU_PSCI_0_2_FN_PSCI_VERSION:
@@ -215,7 +215,7 @@ err:
return;
cpu_off:
- ret = arm_set_cpu_off(cpu->mp_affinity);
+ ret = arm_set_cpu_off(arm_cpu_mp_affinity(cpu));
/* notreached */
/* sanity check in case something failed */
assert(ret == QEMU_ARM_POWERCTL_RET_SUCCESS);