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[176.184.43.236]) by smtp.gmail.com with ESMTPSA id k20-20020a05600c1c9400b0040e54f15d3dsm3212195wms.31.2024.01.10.11.53.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 10 Jan 2024 11:53:47 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcin Juszkiewicz , qemu-arm@nongnu.org, Kevin Wolf , Igor Mitsyanko , =?utf-8?q?Alex_Benn=C3=A9e?= , Radoslaw Biernacki , "Edgar E. Iglesias" , Leif Lindholm , Rob Herring , Markus Armbruster , Alistair Francis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v3 02/14] hw/arm/armv7m: Ensure requested CPU type implements ARM_FEATURE_M Date: Wed, 10 Jan 2024 20:53:16 +0100 Message-ID: <20240110195329.3995-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240110195329.3995-1-philmd@linaro.org> References: <20240110195329.3995-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org ARMV7M container can only accept M-profile CPU types. Check requested type is valid once to allow further simplifications. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/arm/armv7m.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index d239468558..8900730e53 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -300,6 +300,10 @@ static void armv7m_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } + if (!arm_feature(&s->cpu->env, ARM_FEATURE_M)) { + error_setg(errp, "armv7m: CPU must be of Cortex-M family"); + return; + } cpudev = DEVICE(s->cpu); object_property_set_link(OBJECT(s->cpu), "memory", OBJECT(&s->container),