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[209.51.188.17]) by mx.google.com with ESMTPS id z8-20020ac87f88000000b004254df9e45csi1807136qtj.482.2023.12.21.02.49.09 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Dec 2023 02:49:09 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mKgtAkfA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rGGak-0004hU-VR; Thu, 21 Dec 2023 05:47:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rGGaV-0004C0-9c for qemu-devel@nongnu.org; Thu, 21 Dec 2023 05:47:39 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rGGa5-0007Mw-Nb for qemu-devel@nongnu.org; Thu, 21 Dec 2023 05:47:34 -0500 Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-3366ddd1eddso559519f8f.0 for ; Thu, 21 Dec 2023 02:47:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703155627; x=1703760427; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Fv8i/ZD80zCUMWCrsFxA5ec1+Ry+9mZct9W/s18lf+Y=; b=mKgtAkfAD8Qo6JZC1rPv5qt870cnVG/Am8kaym5uOaIW97cdVGXNpQBONR/Hym5SNA GVCXZe8NSDW1+vfysG6R3Ml9JgOXDmj4qgtFQawBzqCoHEKuZY5Ify8cXCYBC40pyP7/ +srvrNc38hxlk/hHtZ4LNL55tEcZFZH5jG/cQgNfwj0f9RWgbi4T5kGrKG5/um1E0xsi dC7vbQYQbIjOoT+3RkmiKneqmvOM7tRGhgI6FnmYth04G7ASvcE8Lm7w22RstLo+1Fqb 6b3PqdGJo0vRXO/pkpePqJLuXecdJIyLdACUB7kkwIZG826KG3iB6qmCRz723cI0Jp1m WPFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703155627; x=1703760427; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Fv8i/ZD80zCUMWCrsFxA5ec1+Ry+9mZct9W/s18lf+Y=; b=MBsGvV/XX/GWd5I630P7nEjH7jNtTICShbIR3xSDWzdK/D1ztU8PaA05ARYN7qBNZU jtE8UIHP+jh77KJcSYiUowGJdOIP3Pj3i42IJd0VyTnw8u+BhWiUTe6/GO44zKC/CMAJ AOWEEAhM90o35ikOpWDpKSemvQLAvr5PdElByqVYmFNDRe9ynYnA0AjvOGSk1mooT5B0 MEd6u0yNxr/FKAKrRZIk0KmWeSvDhChLnbFEdZ7WjzKe2MUISHwB+wOuWv5tuEMqNQp3 NqPQlIp3iBZ5abN+BzT2PB3eZ/8xg1dJoR1ZEI2fIUHlWpSHtRihKJnviUMXG1gg4c9r Px8A== X-Gm-Message-State: AOJu0YxSvuRkuVlN3tGpB2OdUYUxUSrfMf4g6LdxTtp1j8lNQweESWJK gJ4mcyBvjjZ1rXuF53Q36GWhbg== X-Received: by 2002:adf:f847:0:b0:333:3117:c434 with SMTP id d7-20020adff847000000b003333117c434mr282369wrq.197.1703155627048; Thu, 21 Dec 2023 02:47:07 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id p9-20020adfcc89000000b003368100ff71sm1742800wrj.10.2023.12.21.02.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Dec 2023 02:47:06 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 418035F8ED; Thu, 21 Dec 2023 10:38:21 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , John Snow , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Yanan Wang , Eduardo Habkost , Brian Cain , Laurent Vivier , Palmer Dabbelt , Cleber Rosa , David Hildenbrand , Beraldo Leal , Pierrick Bouvier , Weiwei Li , =?utf-8?q?Alex_Benn=C3=A9e?= , Paul Durrant , qemu-s390x@nongnu.org, David Woodhouse , Liu Zhiwei , Ilya Leoshkevich , Wainer dos Santos Moschetta , Michael Rolnik , Alistair Francis , Daniel Henrique Barboza , Laurent Vivier , kvm@vger.kernel.org, =?utf-8?q?Marc-An?= =?utf-8?q?dr=C3=A9_Lureau?= , Alexandre Iooss , Thomas Huth , Peter Maydell , qemu-ppc@nongnu.org, Paolo Bonzini , Marcel Apfelbaum , Nicholas Piggin , qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Song Gao , Yoshinori Sato , Richard Henderson , Daniel Henrique Barboza , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Mahmoud Mandour , Bin Meng , Akihiko Odaki Subject: [PATCH 24/40] target/riscv: Validate misa_mxl_max only once Date: Thu, 21 Dec 2023 10:38:02 +0000 Message-Id: <20231221103818.1633766-25-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231221103818.1633766-1-alex.bennee@linaro.org> References: <20231221103818.1633766-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Akihiko Odaki misa_mxl_max is now a class member and initialized only once for each class. This also moves the initialization of gdb_core_xml_file which will be referenced before realization in the future. Signed-off-by: Akihiko Odaki Message-Id: <20231213-riscv-v7-4-a760156a337f@daynix.com> Signed-off-by: Alex Bennée --- target/riscv/cpu.c | 21 +++++++++++++++++++++ target/riscv/tcg/tcg-cpu.c | 23 ----------------------- 2 files changed, 21 insertions(+), 23 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 2ab61df2217..b799f133604 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1247,6 +1247,26 @@ static const MISAExtInfo misa_ext_info_arr[] = { MISA_EXT_INFO(RVG, "g", "General purpose (IMAFD_Zicsr_Zifencei)"), }; +static void riscv_cpu_validate_misa_mxl(RISCVCPUClass *mcc) +{ + CPUClass *cc = CPU_CLASS(mcc); + + /* Validate that MISA_MXL is set properly. */ + switch (mcc->misa_mxl_max) { +#ifdef TARGET_RISCV64 + case MXL_RV64: + case MXL_RV128: + cc->gdb_core_xml_file = "riscv-64bit-cpu.xml"; + break; +#endif + case MXL_RV32: + cc->gdb_core_xml_file = "riscv-32bit-cpu.xml"; + break; + default: + g_assert_not_reached(); + } +} + static int riscv_validate_misa_info_idx(uint32_t bit) { int idx; @@ -1695,6 +1715,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) RISCVCPUClass *mcc = RISCV_CPU_CLASS(c); mcc->misa_mxl_max = (uint32_t)(uintptr_t)data; + riscv_cpu_validate_misa_mxl(mcc); } static void riscv_isa_string_ext(RISCVCPU *cpu, char **isa_str, diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 7f6712c81a4..eb243e011ca 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -148,27 +148,6 @@ static void riscv_cpu_validate_misa_priv(CPURISCVState *env, Error **errp) } } -static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu) -{ - RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cpu); - CPUClass *cc = CPU_CLASS(mcc); - - /* Validate that MISA_MXL is set properly. */ - switch (mcc->misa_mxl_max) { -#ifdef TARGET_RISCV64 - case MXL_RV64: - case MXL_RV128: - cc->gdb_core_xml_file = "riscv-64bit-cpu.xml"; - break; -#endif - case MXL_RV32: - cc->gdb_core_xml_file = "riscv-32bit-cpu.xml"; - break; - default: - g_assert_not_reached(); - } -} - static void riscv_cpu_validate_priv_spec(RISCVCPU *cpu, Error **errp) { CPURISCVState *env = &cpu->env; @@ -676,8 +655,6 @@ static bool tcg_cpu_realize(CPUState *cs, Error **errp) return false; } - riscv_cpu_validate_misa_mxl(cpu); - #ifndef CONFIG_USER_ONLY CPURISCVState *env = &cpu->env; Error *local_err = NULL;