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Iglesias" , Andrew Jeffery , Rob Herring , qemu-arm@nongnu.org, Mark Cave-Ayland , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 06/33] hw/cpu/arm: Rename 'busdev' -> 'gicsbd' in a15mp_priv_realize() Date: Tue, 12 Dec 2023 17:29:06 +0100 Message-ID: <20231212162935.42910-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231212162935.42910-1-philmd@linaro.org> References: <20231212162935.42910-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org 'busdev' is the internal GIC as SysBus device. Since we already have a 'gicdev' variable for the GIC as QDev, rename 'busdev' as 'gicsbd' to make it clear we access the IRQ lines from the GIC. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/cpu/a15mpcore.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index bfd8aa5644..a40f142128 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -51,7 +51,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) SysBusDevice *sbd = SYS_BUS_DEVICE(dev); A15MPPrivState *s = A15MPCORE_PRIV(dev); DeviceState *gicdev; - SysBusDevice *busdev; + SysBusDevice *gicsbd; int i; bool has_el3; bool has_el2 = false; @@ -78,10 +78,10 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) { return; } - busdev = SYS_BUS_DEVICE(&s->gic); + gicsbd = SYS_BUS_DEVICE(&s->gic); /* Pass through outbound IRQ lines from the GIC */ - sysbus_pass_irq(sbd, busdev); + sysbus_pass_irq(sbd, gicsbd); /* Pass through inbound GPIO lines to the GIC */ qdev_init_gpio_in(dev, a15mp_priv_set_irq, s->num_irq - 32); @@ -126,17 +126,17 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) * 0x6000-0x7fff -- GIC virtual CPU interface */ memory_region_add_subregion(&s->container, 0x1000, - sysbus_mmio_get_region(busdev, 0)); + sysbus_mmio_get_region(gicsbd, 0)); memory_region_add_subregion(&s->container, 0x2000, - sysbus_mmio_get_region(busdev, 1)); + sysbus_mmio_get_region(gicsbd, 1)); if (has_el2) { memory_region_add_subregion(&s->container, 0x4000, - sysbus_mmio_get_region(busdev, 2)); + sysbus_mmio_get_region(gicsbd, 2)); memory_region_add_subregion(&s->container, 0x6000, - sysbus_mmio_get_region(busdev, 3)); + sysbus_mmio_get_region(gicsbd, 3)); for (i = 0; i < s->num_cpu; i++) { hwaddr base = 0x5000 + i * 0x200; - MemoryRegion *mr = sysbus_mmio_get_region(busdev, + MemoryRegion *mr = sysbus_mmio_get_region(gicsbd, 4 + s->num_cpu + i); memory_region_add_subregion(&s->container, base, mr); }