From patchwork Tue Dec 12 16:29:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 753096 Delivered-To: patch@linaro.org Received: by 2002:a5d:4c83:0:b0:333:3a04:f257 with SMTP id z3csp2011459wrs; Tue, 12 Dec 2023 08:33:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IGI8Qqt5HPIBJkaM0rm7egHQjmJYijWaHRzkyngkSXouwn4Ok17ZtrT+X/b/H0ioluCABz8 X-Received: by 2002:a05:620a:178e:b0:77b:ec3a:27c8 with SMTP id ay14-20020a05620a178e00b0077bec3a27c8mr4636911qkb.63.1702398798662; Tue, 12 Dec 2023 08:33:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702398798; cv=none; d=google.com; s=arc-20160816; b=Hdi0LS89vRY5YmRQnwHVNqP+7y5kJPLB2DNIFH7sg+l+kEWufPqfX5zIpUuXxTtelK 0doK559kYKNNrHe8B7vUBmznQ2z/hmS5P6RCwUBFVq3KHsS9gLqvskqiWpB4QSmJSMqv Ho8OwJP/Z3GDDhIFUgTWCBI25b0L9zt+SoJoAe9trnJeHvUuKNHV+/4gGxhhmqnQWYMa LNgMUKmNRUw+X+OLeWKBDjDx7cKwsf3xgoY47bO/xs6HMg4ts6Sw9sgy6cE40MGqSRm2 QPuEPhhDJLz8wzyBpWd/bpGNn/5il2ykxUYU4KPrC/QIRlwF0rDHLm7Mz2CZ96AUK1Lb HaxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Ntmhn8CuDxjNGoVZ5yGIEeRznutb1/fx3IdQEKhFga0=; fh=CkupYgn1Qmdh7jizui9HJgGegpqbRR5NXz1VyjRE1Hs=; b=P4o4vF4CQiMT6BYmNpR9SaF3n+MKs1E2A7TVOhpsdeizKb1IgPPFBdsG5Dnns0TWA8 ijZFp70kQMr2qhLX2vmTb4NtcfyU3UiqDDw0fnQxg8V8Fh2VmMy7VoWRwgvI8Ckkx/wF nwnCRDxrnyHbdnbiAccT6Ti1mixpZLv6OEG0fTq/zafGBEB9KzBnDpE4Q9IFuQuSDX0C 2yRR3CXzyxek1vqZYHgwnMIt6rhfgwNCJckfFIVrLMJFYEyPRHWnR9/MyYHb63Hu4lMx Qb7qHHEFGlWMYpFRRbkDgDcgs3VGMCFAYUtLn+rnqm9tRNal5mS5Ftmaxv1M81uA/csI Ac/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WzMZ6DQy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s14-20020a05620a29ce00b0077dc90f19c3si11336046qkp.312.2023.12.12.08.33.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Dec 2023 08:33:18 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WzMZ6DQy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rD5el-0001Rm-Kv; Tue, 12 Dec 2023 11:30:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rD5eB-0000vl-SE for qemu-devel@nongnu.org; Tue, 12 Dec 2023 11:30:16 -0500 Received: from mail-lj1-x234.google.com ([2a00:1450:4864:20::234]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rD5e9-0007Cs-Ow for qemu-devel@nongnu.org; Tue, 12 Dec 2023 11:30:15 -0500 Received: by mail-lj1-x234.google.com with SMTP id 38308e7fff4ca-2c9e9c2989dso79323771fa.0 for ; Tue, 12 Dec 2023 08:30:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702398611; x=1703003411; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ntmhn8CuDxjNGoVZ5yGIEeRznutb1/fx3IdQEKhFga0=; b=WzMZ6DQyDgC3e/937XNwSe9dXEys4VG+R2ENy/tbyGl/bDx49hEy9eyjDWyVgZmmlH 4s4B6xtrROXPxXQda7IMZTxFd1xBtWjGvLJErYV8FDpa3hFxKJvn/1m3fp+MXRb1ftAk G1xUok4fPFH2zVHoZBHW0HgAhrr8nKabNsbx+B8KjgwDxPilpq7DowSlirUzN50pccBW EnhsNb3+TmZq5Dv8t3txsnL2LF4NH7a0zUeWA3nAZmIevLg97hWS/b3lBsoZeB6MAAGh eRGCCPyPk8QjEZU3CEuC+Ohx7RXCNh+Rmiu4GI13JGZz0TpT665SaKazjfmJusbCj6J7 0gIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702398611; x=1703003411; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ntmhn8CuDxjNGoVZ5yGIEeRznutb1/fx3IdQEKhFga0=; b=TbH/QTZrVJlUStQSaZ3gihfqxW8X9se6jQ5W4OL7HLhmqT9wxCTVnHVzOwHaUr4lGg esGNG69tsepzrUsegTzcWixD1jKPPW9GJ72R29JTPPPMmQYnxe90yaN7F2U3itcQPAgu R+W7ngORzQyhan7iLYpZuKG8SSpPZWKQp59BHzIzqDZWLEg2OI6GUWbXiFwGen7es7cB nvQsHTcWDJ1oim/rw7hPz84dFBuFA0yRbbkf5+XRQd95KY0oxP+4I8RCbyUPd1bx2Y+K PdeDBoT1CLtRNL/Cpb74DQYhcAmk4O10D479UAuqrek8Q+YGNU6M4tHvcYgDObr0FCkM +fYw== X-Gm-Message-State: AOJu0YzKM74SRQpD2lsqf6ptYEKYGxUqZ2jIe77mFtSb+r310fqqKyvC BArYXvgMeKZxOVtaFhsPIJAokeEmHNpcxSplfm0= X-Received: by 2002:a05:651c:b0c:b0:2cb:2f4a:4ee1 with SMTP id b12-20020a05651c0b0c00b002cb2f4a4ee1mr2683827ljr.11.1702398610911; Tue, 12 Dec 2023 08:30:10 -0800 (PST) Received: from m1x-phil.lan ([176.176.175.193]) by smtp.gmail.com with ESMTPSA id c27-20020a50d65b000000b0054c9bbd07e7sm5049547edj.54.2023.12.12.08.30.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Dec 2023 08:30:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Tyrone Ting , =?utf-8?q?Alex_Benn=C3=A9e?= , Manos Pitsidianakis , Eduardo Habkost , Joel Stanley , Alistair Francis , Anton Johansson , Andrey Smirnov , Peter Maydell , Hao Wu , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jean-Christophe Dubois , Igor Mitsyanko , "Edgar E. Iglesias" , Andrew Jeffery , Rob Herring , qemu-arm@nongnu.org, Mark Cave-Ayland , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 04/33] hw/arm/fsl-imx7: Add a local 'gic' variable Date: Tue, 12 Dec 2023 17:29:04 +0100 Message-ID: <20231212162935.42910-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231212162935.42910-1-philmd@linaro.org> References: <20231212162935.42910-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::234; envelope-from=philmd@linaro.org; helo=mail-lj1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The A7MPCore forward the IRQs from its internal GIC. To make the code clearer, add a 'gic' variable. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/fsl-imx7.c | 38 +++++++++++++++++--------------------- 1 file changed, 17 insertions(+), 21 deletions(-) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 474cfdc87c..a283dcb45f 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -163,6 +163,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) { MachineState *ms = MACHINE(qdev_get_machine()); FslIMX7State *s = FSL_IMX7(dev); + DeviceState *gic; Object *o; int i; qemu_irq irq; @@ -209,6 +210,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX7_A7MPCORE_ADDR); + gic = DEVICE(&s->a7mpcore); for (i = 0; i < smp_cpus; i++) { SysBusDevice *sbd = SYS_BUS_DEVICE(&s->a7mpcore); @@ -252,8 +254,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, FSL_IMX7_GPTn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0, - qdev_get_gpio_in(DEVICE(&s->a7mpcore), - FSL_IMX7_GPTn_IRQ[i])); + qdev_get_gpio_in(gic, FSL_IMX7_GPTn_IRQ[i])); } /* @@ -295,12 +296,10 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) FSL_IMX7_GPIOn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, - qdev_get_gpio_in(DEVICE(&s->a7mpcore), - FSL_IMX7_GPIOn_LOW_IRQ[i])); + qdev_get_gpio_in(gic, FSL_IMX7_GPIOn_LOW_IRQ[i])); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1, - qdev_get_gpio_in(DEVICE(&s->a7mpcore), - FSL_IMX7_GPIOn_HIGH_IRQ[i])); + qdev_get_gpio_in(gic, FSL_IMX7_GPIOn_HIGH_IRQ[i])); } /* @@ -352,8 +351,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, FSL_IMX7_SPIn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, - qdev_get_gpio_in(DEVICE(&s->a7mpcore), - FSL_IMX7_SPIn_IRQ[i])); + qdev_get_gpio_in(gic, FSL_IMX7_SPIn_IRQ[i])); } /* @@ -378,8 +376,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, FSL_IMX7_I2Cn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0, - qdev_get_gpio_in(DEVICE(&s->a7mpcore), - FSL_IMX7_I2Cn_IRQ[i])); + qdev_get_gpio_in(gic, FSL_IMX7_I2Cn_IRQ[i])); } /* @@ -413,7 +410,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, FSL_IMX7_UARTn_ADDR[i]); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_UARTn_IRQ[i]); + irq = qdev_get_gpio_in(gic, FSL_IMX7_UARTn_IRQ[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, irq); } @@ -451,9 +448,9 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth[i]), 0, FSL_IMX7_ENETn_ADDR[i]); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_ENET_IRQ(i, 0)); + irq = qdev_get_gpio_in(gic, FSL_IMX7_ENET_IRQ(i, 0)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 0, irq); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_ENET_IRQ(i, 3)); + irq = qdev_get_gpio_in(gic, FSL_IMX7_ENET_IRQ(i, 3)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 1, irq); } @@ -480,7 +477,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->usdhc[i]), 0, FSL_IMX7_USDHCn_ADDR[i]); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_USDHCn_IRQ[i]); + irq = qdev_get_gpio_in(gic, FSL_IMX7_USDHCn_IRQ[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->usdhc[i]), 0, irq); } @@ -519,8 +516,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX7_WDOGn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0, - qdev_get_gpio_in(DEVICE(&s->a7mpcore), - FSL_IMX7_WDOGn_IRQ[i])); + qdev_get_gpio_in(gic, FSL_IMX7_WDOGn_IRQ[i])); } /* @@ -596,13 +592,13 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX7_PCIE_REG_ADDR); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTA_IRQ); + irq = qdev_get_gpio_in(gic, FSL_IMX7_PCI_INTA_IRQ); sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 0, irq); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTB_IRQ); + irq = qdev_get_gpio_in(gic, FSL_IMX7_PCI_INTB_IRQ); sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 1, irq); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTC_IRQ); + irq = qdev_get_gpio_in(gic, FSL_IMX7_PCI_INTC_IRQ); sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 2, irq); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTD_IRQ); + irq = qdev_get_gpio_in(gic, FSL_IMX7_PCI_INTD_IRQ); sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq); /* @@ -631,7 +627,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, FSL_IMX7_USBn_ADDR[i]); - irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_USBn_IRQ[i]); + irq = qdev_get_gpio_in(gic, FSL_IMX7_USBn_IRQ[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, irq); snprintf(name, NAME_SIZE, "usbmisc%d", i);