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[176.184.13.61]) by smtp.gmail.com with ESMTPSA id f3-20020a170906c08300b00a0a25541153sm5049993ejz.93.2023.11.28.05.38.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 28 Nov 2023 05:38:18 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Michael Rolnik , BALATON Zoltan , Gihun Nam , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 6/7] hw/avr/atmega: Fix wrong initial value of stack pointer Date: Tue, 28 Nov 2023 14:37:39 +0100 Message-ID: <20231128133740.64525-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128133740.64525-1-philmd@linaro.org> References: <20231128133740.64525-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Gihun Nam The current implementation initializes the stack pointer of AVR devices to 0. Although older AVR devices used to be like that, newer ones set it to RAMEND. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1525 Signed-off-by: Gihun Nam Reviewed-by: Philippe Mathieu-Daudé Message-ID: Signed-off-by: Philippe Mathieu-Daudé --- target/avr/cpu.h | 3 +++ hw/avr/atmega.c | 4 ++++ target/avr/cpu.c | 10 +++++++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/target/avr/cpu.h b/target/avr/cpu.h index 8a17862737..7960c5c57a 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -145,6 +145,9 @@ struct ArchCPU { CPUState parent_obj; CPUAVRState env; + + /* Initial value of stack pointer */ + uint32_t init_sp; }; /** diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index a34803e642..31c8992d75 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -233,6 +233,10 @@ static void atmega_realize(DeviceState *dev, Error **errp) /* CPU */ object_initialize_child(OBJECT(dev), "cpu", &s->cpu, mc->cpu_type); + + object_property_set_uint(OBJECT(&s->cpu), "init-sp", + mc->io_size + mc->sram_size - 1, &error_abort); + qdev_realize(DEVICE(&s->cpu), NULL, &error_abort); cpudev = DEVICE(&s->cpu); diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 44de1e18d1..999c010ded 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -25,6 +25,7 @@ #include "cpu.h" #include "disas/dis-asm.h" #include "tcg/debug-assert.h" +#include "hw/qdev-properties.h" static void avr_cpu_set_pc(CPUState *cs, vaddr value) { @@ -95,7 +96,7 @@ static void avr_cpu_reset_hold(Object *obj) env->rampY = 0; env->rampZ = 0; env->eind = 0; - env->sp = 0; + env->sp = cpu->init_sp; env->skip = 0; @@ -152,6 +153,11 @@ static void avr_cpu_initfn(Object *obj) sizeof(cpu->env.intsrc) * 8); } +static Property avr_cpu_properties[] = { + DEFINE_PROP_UINT32("init-sp", AVRCPU, init_sp, 0), + DEFINE_PROP_END_OF_LIST() +}; + static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; @@ -228,6 +234,8 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) device_class_set_parent_realize(dc, avr_cpu_realizefn, &mcc->parent_realize); + device_class_set_props(dc, avr_cpu_properties); + resettable_class_set_parent_phases(rc, NULL, avr_cpu_reset_hold, NULL, &mcc->parent_phases);