diff mbox series

[PULL,05/23] target/arm: hide aliased MIDR from gdbstub

Message ID 20231107142354.3151266-6-alex.bennee@linaro.org
State Accepted
Commit acd8e83a2f81a6ac98f0ddffd2b476d6c9d8a48a
Headers show
Series [PULL,01/23] default-configs: Add TARGET_XML_FILES definition | expand

Commit Message

Alex Bennée Nov. 7, 2023, 2:23 p.m. UTC 
This is just a constant alias register with the same value as the
"other" MIDR so it serves no purpose being presented to gdbstub.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20231106185112.2755262-6-alex.bennee@linaro.org>
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6acd87f5b9..ff1970981e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9000,7 +9000,7 @@  void register_cp_regs_for_features(ARMCPU *cpu)
               .type = ARM_CP_CONST, .resetvalue = cpu->revidr },
         };
         ARMCPRegInfo id_v8_midr_alias_cp_reginfo = {
-            .name = "MIDR", .type = ARM_CP_ALIAS | ARM_CP_CONST,
+            .name = "MIDR", .type = ARM_CP_ALIAS | ARM_CP_CONST | ARM_CP_NO_GDB,
             .cp = 15, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 4,
             .access = PL1_R, .resetvalue = cpu->midr
         };