[14/35] tcg: Move vec_gen_* declarations to tcg-internal.h

Message ID	20231107024842.7650-15-richard.henderson@linaro.org
State	Accepted
Commit	27c758fd22a825783228dbdd339fd55da08a5ff3
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PATCH 14/35] tcg: Move vec_gen_* declarations to tcg-internal.h Date: Mon, 6 Nov 2023 18:48:21 -0800 Message-Id: <20231107024842.7650-15-richard.henderson@linaro.org> In-Reply-To: <20231107024842.7650-1-richard.henderson@linaro.org> References: <20231107024842.7650-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::334; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org
Series	[01/35] accel/tcg: Move HMP info jit and info opcount code \| expand [01/35] accel/tcg: Move HMP info jit and info opcount code [02/35] tcg: Add C_N2_I1 [03/35] tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a_i128 [04/35] util: Add cpuinfo for loongarch64 [05/35] tcg/loongarch64: Use cpuinfo.h [06/35] host/include/loongarch64: Add atomic16 load and store [07/35] accel/tcg: Remove redundant case in store_atom_16 [08/35] accel/tcg: Fix condition for store_atom_insert_al16 [09/35] tcg: Mark tcg_gen_op as noinline [10/35] tcg: Move tcg_gen_op* out of line [11/35] tcg: Move generic expanders out of line [12/35] tcg: Move 32-bit expanders out of line [13/35] tcg: Move 64-bit expanders out of line [14/35] tcg: Move vec_gen_* declarations to tcg-internal.h [15/35] tcg: Move tcg_gen_opN declarations to tcg-internal.h [16/35] tcg: Unexport tcg_gen_op_{i32,i64} [17/35] tcg: Move tcg_constant_ out of line [18/35] tcg: Move tcg_temp_new_, tcg_global_mem_new_ out of line [19/35] tcg: Move tcg_temp_free_* out of line [20/35] tcg/mips: Split out tcg_out_setcond_int [21/35] tcg/mips: Always implement movcond [22/35] tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64} [23/35] tcg/mips: Implement neg opcodes [24/35] tcg/loongarch64: Implement neg opcodes [25/35] tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} [26/35] tcg: Don't free vector results [27/35] tcg/optimize: Pipe OptContext into reset_ts [28/35] tcg/optimize: Split out cmp_better_copy [29/35] tcg/optimize: Optimize env memory operations [30/35] tcg: Eliminate duplicate env store operations [31/35] tcg/optimize: Split out arg_new_constant [32/35] tcg: Canonicalize subi to addi during opcode generation [33/35] tcg/optimize: Canonicalize subi to addi during optimization [34/35] tcg/optimize: Canonicalize sub2 with constants to add2 [35/35] tcg/sparc64: Implement tcg_out_extrl_i64_i32

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20231107024842.7650-15-richard.henderson@linaro.org

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Accepted

Commit

27c758fd22a825783228dbdd339fd55da08a5ff3

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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH 14/35] tcg: Move vec_gen_* declarations to tcg-internal.h
Date: Mon,  6 Nov 2023 18:48:21 -0800
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Series

[01/35] accel/tcg: Move HMP info jit and info opcount code | expand

Commit Message

Richard Henderson Nov. 7, 2023, 2:48 a.m. UTC

These are used within tcg-op-vec.c and tcg/host/tcg-target.c.inc.
There are no uses outside tcg/.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231029210848.78234-7-richard.henderson@linaro.org>
---
 include/tcg/tcg-op-common.h | 4 ----
 tcg/tcg-internal.h          | 4 ++++
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h
index f5ec54f874..3f8b214376 100644
--- a/include/tcg/tcg-op-common.h
+++ b/include/tcg/tcg-op-common.h
@@ -21,10 +21,6 @@  void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
 void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
 void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
 
-void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
-void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
-void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
-
 void tcg_gen_op1_i32(TCGOpcode, TCGv_i32);
 void tcg_gen_op1_i64(TCGOpcode, TCGv_i64);
 void tcg_gen_op1i(TCGOpcode, TCGArg);
diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h
index 40a69e6e6e..f18d282abb 100644
--- a/tcg/tcg-internal.h
+++ b/tcg/tcg-internal.h
@@ -83,4 +83,8 @@  static inline TCGv_i64 TCGV128_HIGH(TCGv_i128 t)
 
 bool tcg_target_has_memory_bswap(MemOp memop);
 
+void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
+void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
+void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
+
 #endif /* TCG_INTERNAL_H */

[14/35] tcg: Move vec_gen_* declarations to tcg-internal.h

Commit Message

Patch