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[176.131.220.199]) by smtp.gmail.com with ESMTPSA id a1-20020a05600c348100b003fe1fe56202sm12104665wmq.33.2023.11.06.03.08.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 06 Nov 2023 03:08:06 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang Subject: [PULL 39/60] exec/cpu: Have cpu_exec_realize() return a boolean Date: Mon, 6 Nov 2023 12:03:11 +0100 Message-ID: <20231106110336.358-40-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106110336.358-1-philmd@linaro.org> References: <20231106110336.358-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::230; envelope-from=philmd@linaro.org; helo=mail-lj1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"), have cpu_exec_realizefn() return a boolean indicating whether an error is set or not. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230918160257.30127-22-philmd@linaro.org> --- include/hw/core/cpu.h | 2 +- cpu-target.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5d6f8dca43..eb943efb8f 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1152,7 +1152,7 @@ G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...) /* $(top_srcdir)/cpu.c */ void cpu_class_init_props(DeviceClass *dc); void cpu_exec_initfn(CPUState *cpu); -void cpu_exec_realizefn(CPUState *cpu, Error **errp); +bool cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); void cpu_exec_reset_hold(CPUState *cpu); diff --git a/cpu-target.c b/cpu-target.c index 79363ae370..f3e1ad8bcd 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -131,13 +131,13 @@ const VMStateDescription vmstate_cpu_common = { }; #endif -void cpu_exec_realizefn(CPUState *cpu, Error **errp) +bool cpu_exec_realizefn(CPUState *cpu, Error **errp) { /* cache the cpu class for the hotpath */ cpu->cc = CPU_GET_CLASS(cpu); if (!accel_cpu_common_realize(cpu, errp)) { - return; + return false; } /* Wait until cpu initialization complete before exposing cpu. */ @@ -159,6 +159,8 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu); } #endif /* CONFIG_USER_ONLY */ + + return true; } void cpu_exec_unrealizefn(CPUState *cpu)