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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v20-20020aa78514000000b006934e7ceb79sm1800230pfn.32.2023.11.01.18.37.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Nov 2023 18:37:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH v3 85/88] hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memory Date: Wed, 1 Nov 2023 18:30:13 -0700 Message-Id: <20231102013016.369010-86-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231102013016.369010-1-richard.henderson@linaro.org> References: <20231102013016.369010-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Helge Deller The CPU HPA is in the high F-region on PA2.0 CPUs, so use F_EXTEND() to trigger interrupt request at the right CPU HPA address. Note that the cpu_hpa value comes out of the IRT, which doesn't store the higher addresss bits. Signed-off-by: Helge Deller --- hw/pci-host/astro.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index df61386bd9..b19f0917c5 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -384,7 +384,7 @@ static void elroy_set_irq(void *opaque, int irq, int level) uint32_t ena = bit & ~old_ilr; s->ilr = old_ilr | bit; if (ena != 0) { - stl_be_phys(&address_space_memory, cpu_hpa, val & 63); + stl_be_phys(&address_space_memory, F_EXTEND(cpu_hpa), val & 63); } } else { s->ilr = old_ilr & ~bit;