From patchwork Thu Nov 2 01:29:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 740390 Delivered-To: patch@linaro.org Received: by 2002:a5d:538f:0:b0:32d:baff:b0ca with SMTP id d15csp595975wrv; Wed, 1 Nov 2023 18:41:02 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG8wgc+WNBAcH95FAlC4O1TbZBsO1xjs4Eleqb5UM8l6TVhvcR3wjkAAa1PNhfSD51PWvpH X-Received: by 2002:a1f:f28f:0:b0:49a:b9ed:8c1f with SMTP id q137-20020a1ff28f000000b0049ab9ed8c1fmr12711713vkh.0.1698889262546; Wed, 01 Nov 2023 18:41:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698889262; cv=none; d=google.com; s=arc-20160816; b=pX7QU/AqAzQLMnVwlH92InBJ8f/K9GHehJbUICv+K0WOpW8HL9Svk2E2g4U+RdNYAu fa26DRhpmms8LGPlbGyW66eQ08wToiBoohqoigCyr2aWsTzJ7TFwt/IlfMWVJiLOD0S1 Bc5+KvV30YcIlETy+82rjZ3evDCCg1GKNx93bk8v7my+uN0JgjObTlIuCB66yInqE6Rz q5WLSmPRnapBl8aeR9olaN5fDTSPL61BniNTtthBx+dBkjfzbE2RBwmhru5/qUfxKkqP EFdCJaKOvH3wz9H67sKwlEHGSHz8K8YrCyv0BN744Szi7Hdj/ATyZAAjU1XLKBUVJ+Ha cPtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TlmvaxlY9UgjcMmC1xCbzus1zwL6bLCGJMO5gWkqRLs=; fh=f2WZoDMBYjCKWIIOoPI+rQtxlv4fmOm4u+dLdQLqpOk=; b=eWinp1CixVY0sd/uKFw7oi3DVnMsNL9nm8E8i9kfVCvt5Julb94eZyRajIrN8TZCPM g5vg18gRSB5mhGc1Y2PkbGvzQyRxPgcb9/PQbZTgKUbN0/xaNkCp1IJV1vkTiIjOnN0u rT3pHM/uzXb+TiVT9UJvO3g8HBJaGvADJswVNFy6r6bYr4vSOoIXA/4KZ/r10kGzwn2c uoe7FkKwervI0nWQn//32ymrW6GC6bpw1N8AZLifeUSF9CHiZe5IpuD4M2vW20AnVx1k djx+WgI21njG/o1gYXHfKnvzeWiw3dFqJpmd8ovAlBocAYPRRMoCviI8dKLkQA0F4Bqt u/fA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="qiwUXYx/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id sw6-20020a05620a4bc600b007758ffaef15si3310027qkn.522.2023.11.01.18.41.02 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 01 Nov 2023 18:41:02 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="qiwUXYx/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyMYP-00062W-KR; Wed, 01 Nov 2023 21:31:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyMXq-0005mi-9P for qemu-devel@nongnu.org; Wed, 01 Nov 2023 21:30:50 -0400 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qyMXo-0001dO-4H for qemu-devel@nongnu.org; Wed, 01 Nov 2023 21:30:50 -0400 Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-6b7f0170d7bso500265b3a.2 for ; Wed, 01 Nov 2023 18:30:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698888647; x=1699493447; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TlmvaxlY9UgjcMmC1xCbzus1zwL6bLCGJMO5gWkqRLs=; b=qiwUXYx/W0Z13RljaDqgRYxfmufbNCF+bB7VIddFWrNptqda0sYxf0s/xrUxWko0nc iQC37zNUBZwQFUzAu2oViHvIEyeZCsscBtjQSUz3Iu9ZJN54ZZXxEVJL95f3ZP2rjsq9 c4jRyluifzeExS2zhHo3iLGJh7xCDDE1KKVKEgglh9ijx7JFISc/t6Q2LPtOsy2NGn6S rqVuap9OoHoGUzDrSvROC2+Spyt9DjCoj+1ploJCZ3OxwtI6/btEOmCxpGOo8jqDykk3 J5IsqyvNVRI9UBkjckykWJLhKvIgD94jLCNZzaRKzlMEw04QUaKcC8ArHa5F9sf/ctVG NtuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698888647; x=1699493447; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TlmvaxlY9UgjcMmC1xCbzus1zwL6bLCGJMO5gWkqRLs=; b=O3cGKU45lIYYzrGk9B87GF6GrarR2PA97JbxGfP26GpgYGVq9OwZXJBoaxuQhK2wyh DSgLTORmLbi2/zV18xXx6lCwV7dUUslTefRl9HurZ+XEQR/MIw49CZQHQgQKtDOgirTL wr1Sb78E8yyUIvg9Y0UWYIzgjljIstNTtCuZMK6eb7f+Bo/r0GxizmalalWaj6v+STOS oDPkmabNAZWhXNLCRfS7Arywc1RbZrWVTHzws/MOY+jHsUM8zYZ/EYa2ZXMxlCQvQV3l ck278WmvxBSVSdNzDzeXLLR9MaVhSfbK7NZOq6UX2xxOz6EUcNRKxobKiw5LgtBQHC9x aiog== X-Gm-Message-State: AOJu0YzbcVVTMQOetQ8pbEIr4Md9gTr43BpVfFXCWvOIMi59+rcNJoI1 5gVvQUxMkkauJuQFleQ8nIwh42LA8cSuah4Wskk= X-Received: by 2002:a05:6a00:c82:b0:6bf:50df:2df5 with SMTP id a2-20020a056a000c8200b006bf50df2df5mr20242459pfv.13.1698888646711; Wed, 01 Nov 2023 18:30:46 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id r23-20020aa78457000000b006979f70fdd5sm1784191pfn.219.2023.11.01.18.30.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Nov 2023 18:30:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH v3 31/88] target/hppa: sar register allows only 5 bits on 32-bit CPU Date: Wed, 1 Nov 2023 18:29:19 -0700 Message-Id: <20231102013016.369010-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231102013016.369010-1-richard.henderson@linaro.org> References: <20231102013016.369010-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Helge Deller The sar shift amount register is limited to 5 bits when running a 32-bit CPU. Strip off the remaining bits. The interesting part is, that this register allows to detect at runtime if a physical CPU is capable to execute PA2.0 (64-bit) instructions. Signed-off-by: Helge Deller --- target/hppa/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index cf05d8b6e4..1694b988ae 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2176,7 +2176,7 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a) if (ctl == CR_SAR) { reg = load_gpr(ctx, a->r); tmp = tcg_temp_new(); - tcg_gen_andi_reg(tmp, reg, TARGET_REGISTER_BITS - 1); + tcg_gen_andi_reg(tmp, reg, ctx->is_pa20 ? 63 : 31); save_or_nullify(ctx, cpu_sar, tmp); cond_free(&ctx->null_cond); @@ -2237,7 +2237,7 @@ static bool trans_mtsarcm(DisasContext *ctx, arg_mtsarcm *a) TCGv_reg tmp = tcg_temp_new(); tcg_gen_not_reg(tmp, load_gpr(ctx, a->r)); - tcg_gen_andi_reg(tmp, tmp, TARGET_REGISTER_BITS - 1); + tcg_gen_andi_reg(tmp, tmp, ctx->is_pa20 ? 63 : 31); save_or_nullify(ctx, cpu_sar, tmp); cond_free(&ctx->null_cond);