From patchwork Tue Oct 31 14:32:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 739564 Delivered-To: patch@linaro.org Received: by 2002:a5d:4c47:0:b0:32d:baff:b0ca with SMTP id n7csp1681400wrt; Tue, 31 Oct 2023 07:33:40 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGfpA55bbcLzN6uRcZYIvpFgRjbuiSlj2TOB/pWk2YZt6n/sjF9k5OdszazA/5IDKB2X1Nx X-Received: by 2002:a05:6359:6d8d:b0:168:e112:99b0 with SMTP id tg13-20020a0563596d8d00b00168e11299b0mr8693105rwb.32.1698762820657; Tue, 31 Oct 2023 07:33:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698762820; cv=none; d=google.com; s=arc-20160816; b=ThQy73IY8ir8YzJV0EN/41WWZUZgTZDtUhcnpQpuX/R2aJlvsTo1hl/Mx/q3nEf/cg Xv75mSkb44govfQF6IF3lWGb9+lj15ocT2iIJajyAEFYRTjc4J4uJD/c9wSz8YYxdiQd 6GkYy1acq5i19AT9Wm1xmIqVWC/kTi7KRZZ97Nf6JbcjHzu8MCgAPAr4FeqAusOpBs5a HtQG8US56mWIyj6Y9ozkH5BDyAFSJLjSQY1So/nVUyEOlY5GaeJlp6Pjrl1LG9jofvhG MTxsa5t4YOGWQVwbYC6wf3xYboFnbD/vU4Zddx0PtsoNnRCYP6WV5jcMvnSn8vSBdRAu THqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from:dkim-signature; bh=2CYGRwQkn3vBbegQZVV/vYVzIasu5qHXxrirxpdWc8M=; fh=quVKJN+JogokNzsp4kwoA7mheGRSBID5PxcC4hooSO8=; b=qwOoXsMHQAAzUveZ68t4VQ1RMcYFn6vu3OravKl+FhUYHNqh98WkRwkRqbdT+OrOac P26DNQCTNh7Mt3OW/E3ejAkkbIaaRZPN0FA7Gv9hHnXXQKP8A/337BZjLukuraUhQ+kK MwkKXOtrKQZSZJvAXgvlWWJsJz6sqNN2gGUwKorgsdTKQLzSPtWXW9jxY8cQB0WMjRa7 2XOCkU8aCFcIxGSVDylit6UDQ0b11EamqxpM5qNC1r4lI0ljOz6RV00kgbvakUI/lqOG fEB8FwU4f1F+d7sUUa/m/+OTIzQbWU/pn9sgYfymU16gnJmxQUawxhiDKNolWGpJMrQ3 4gAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YZvFShhC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c6-20020ad44306000000b006581f5f151csi1165856qvs.77.2023.10.31.07.33.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 31 Oct 2023 07:33:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YZvFShhC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qxpnW-0007u5-Ex; Tue, 31 Oct 2023 10:32:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qxpnE-0007ld-As for qemu-devel@nongnu.org; Tue, 31 Oct 2023 10:32:35 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qxpn1-0008C5-WB for qemu-devel@nongnu.org; Tue, 31 Oct 2023 10:32:32 -0400 Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-6b709048d8eso5056099b3a.2 for ; Tue, 31 Oct 2023 07:32:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698762738; x=1699367538; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=2CYGRwQkn3vBbegQZVV/vYVzIasu5qHXxrirxpdWc8M=; b=YZvFShhCceI3SC6Itlt4rHgOejRuQKSiFiiKZ6gfX7Oe/ChQo0H4MC2m7Ksux+VVa2 +3cifE1MVr4mGuk79J5tvMJn19HaethCjm/Fg124r9rALJRbBWe2cxZGjWnhK5i5g3sb WTwo4E5MXoPQlCIB30T4t8s7aPhEhRXMfCMbCAz2s97Nz/hFNSgM9g0kbYK0PWIv0/L2 hkZ0+7/5Vw8QYtAsAfQS0qUGoblRWKLSYHuE2KWx+YCYc/pJwL9kTTAWuAzrHUr/hyCs lW2XnwHQ+naEttTjUeRnRtAx0/OzzphXc3sRR5GqIXgt89OfgBNW+DhQ3xa6SNP2Bvlp TzJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698762738; x=1699367538; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=2CYGRwQkn3vBbegQZVV/vYVzIasu5qHXxrirxpdWc8M=; b=WFTNHH0Sa4Gs9ifOl7u8bjQRcwPJb2J43QmcHmhqakrvUwW0nK01jPA+/lI+PpgP58 KhSxb55ejx/U0laxjr8JYnTPQOdo5kQwo2kityLGTl2YchV/Tg8Su32plunjE9lg7jeS OZzZzOnRTgOcjHOe8tlL5TQkZKh/JEib5CcwAMO2nIn+NK7mhfXa3gUgH7TMRE+wKmgt aAi7vCW66j6ZYKnYzRXO5RMM7I7BDWIGY67CkWp50XS5v89dsw4V+RZ6GZ61RFGmKj6t Gf9fI08Q8EV0Bf/ilwEQ5Ajpi/vJFpLWQW9tf+iZpQJ6JBJjFLKq5hkQyS9I74XZJmGQ XEAg== X-Gm-Message-State: AOJu0YxoV2ftZ+XiDjwRCqayHdMIkry4ZEhR6+ZLt6qm+9majHQAL3yz 6Jd7Q4e9mx/R+UhabkPPI7by3CPfsbWphhtDOkQ= X-Received: by 2002:a05:6a00:1a93:b0:6b6:7a04:6f9 with SMTP id e19-20020a056a001a9300b006b67a0406f9mr11771745pfv.28.1698762737685; Tue, 31 Oct 2023 07:32:17 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id e19-20020a056a001a9300b006be484e5b9asm1321847pfv.188.2023.10.31.07.32.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Oct 2023 07:32:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-stable@nongnu.org Subject: [PATCH v2] target/arm: Fix SVE STR increment Date: Tue, 31 Oct 2023 07:32:15 -0700 Message-Id: <20231031143215.29764-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The previous change missed updating one of the increments and one of the MemOps. Add a test case for all vector lengths. Cc: qemu-stable@nongnu.org Fixes: e6dd5e782be ("target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r") Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/arm/tcg/translate-sve.c | 5 ++-- tests/tcg/aarch64/sve-str.c | 49 +++++++++++++++++++++++++++++++ tests/tcg/aarch64/Makefile.target | 6 +++- 3 files changed, 57 insertions(+), 3 deletions(-) create mode 100644 tests/tcg/aarch64/sve-str.c diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c index 7b39962f20..296e7d1ce2 100644 --- a/target/arm/tcg/translate-sve.c +++ b/target/arm/tcg/translate-sve.c @@ -4294,7 +4294,7 @@ void gen_sve_str(DisasContext *s, TCGv_ptr base, int vofs, t0 = tcg_temp_new_i64(); t1 = tcg_temp_new_i64(); t16 = tcg_temp_new_i128(); - for (i = 0; i < len_align; i += 8) { + for (i = 0; i < len_align; i += 16) { tcg_gen_ld_i64(t0, base, vofs + i); tcg_gen_ld_i64(t1, base, vofs + i + 8); tcg_gen_concat_i64_i128(t16, t0, t1); @@ -4320,7 +4320,8 @@ void gen_sve_str(DisasContext *s, TCGv_ptr base, int vofs, t16 = tcg_temp_new_i128(); tcg_gen_concat_i64_i128(t16, t0, t1); - tcg_gen_qemu_st_i128(t16, clean_addr, midx, MO_LEUQ); + tcg_gen_qemu_st_i128(t16, clean_addr, midx, + MO_LE | MO_128 | MO_ATOM_NONE); tcg_gen_addi_i64(clean_addr, clean_addr, 16); tcg_gen_brcondi_ptr(TCG_COND_LTU, i, len_align, loop); diff --git a/tests/tcg/aarch64/sve-str.c b/tests/tcg/aarch64/sve-str.c new file mode 100644 index 0000000000..551f0d6f18 --- /dev/null +++ b/tests/tcg/aarch64/sve-str.c @@ -0,0 +1,49 @@ +#include +#include + +#define N (256+16) + +static int __attribute__((noinline)) test(int vl) +{ + unsigned char buf[N]; + int err = 0; + + for (int i = 0; i < N; ++i) { + buf[i] = (unsigned char)i; + } + + asm volatile ( + "mov z0.b, #255\n\t" + "str z0, %0" + : : "m" (buf) : "z0", "memory"); + + for (int i = 0; i < vl; ++i) { + if (buf[i] != 0xff) { + fprintf(stderr, "vl %d, index %d, expected 255, got %d\n", + vl, i, buf[i]); + err = 1; + } + } + + for (int i = vl; i < N; ++i) { + if (buf[i] != (unsigned char)i) { + fprintf(stderr, "vl %d, index %d, expected %d, got %d\n", + vl, i, (unsigned char)i, buf[i]); + err = 1; + } + } + + return err; +} + +int main() +{ + int err = 0; + + for (int i = 16; i <= 256; i += 16) { + if (prctl(PR_SVE_SET_VL, i, 0, 0, 0, 0) == i) { + err |= test(i); + } + } + return err; +} diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 62b38c792f..c6542b5f1b 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -103,7 +103,11 @@ sha512-sve: CFLAGS=-O3 -march=armv8.1-a+sve sha512-sve: sha512.c $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) -TESTS += sha512-sve +sve-str: CFLAGS=-O1 -march=armv8.1-a+sve +sve-str: sve-str.c + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) + +TESTS += sha512-sve sve-str ifneq ($(GDB),) GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py