From patchwork Fri Oct 20 15:06:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 736255 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp354263wrl; Fri, 20 Oct 2023 08:08:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHSj5SVZryx79Ug1ytsC3zJJVFAbZIR6mDVcG6leNm4WHnGCj8zLLD7+hnNX+nHpopuRZTu X-Received: by 2002:a05:620a:981:b0:778:8f98:96a with SMTP id x1-20020a05620a098100b007788f98096amr1997896qkx.21.1697814511834; Fri, 20 Oct 2023 08:08:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697814511; cv=none; d=google.com; s=arc-20160816; b=lYVwI91BGTTDnPRP7Ox+HSjZLVJYSOozbcvOoWe9BY0C5Rfc84OmlQip7ZI8aVWKa5 Y1t2CgzwQxtMq/P0Y9TDQbUgs6bT/fePjsKmKIO6ikWb/9k3gkn54Hppha8q4BGn9mkb GAXzQFVyQpnw4kPUqQofvkWfcRWftdBUIj0S/PdJfDmYwpOjMrjmcX4Ngb9njNxPBMNt afjbZB/BwFEINH/R0xSz2XNZ9SdW3cnepMaIlqRksPUkZLao1gI2MB6FTw6voCDgPqJp xtuxYaf8sUvgCmFckUjMJfAcGjMz0nQdwV74Ghhaj1YMUB9YUOumX39fqY07+emRE4/j geHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DGRPHT/WBPalUJTx91B3yYyqtqOtvzDargUZTDcy7QI=; fh=6K1MWX6u3jkCueyV8jYuo9x2BPi9GJqFYEKyGoRKT0U=; b=uiu5tiHB8X4WSQ2Y1tKrtJTLBJsS3BDBqlGyKLT3bUZl8b4Aw/xcvhREasThanGcrT izND2UNSERjDJvYwbuYYifZtnJnhDey3aN64UmbfDeOTjhd09Rrs+2BMOG7CNnjzOqB4 zmmGDSVZVI95RHyVmFvSRuUqAKM5kumZG5kC2/rHnXbYeTP5DpxCOAulSRFRV99zyR73 Nh+38tOVOBCOpy2lmBzjB2VAUIkaVVaZQtYpBmimWXVpbTGdfvhC42KZclNrHgvIDSyn EP4/LRlakFrkeovFyTY7ZYCaESYc/pbnX9a0T4YrTeiPXBHOgJUKT3nX4m+sSEuXLgYz IdjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SHEfxeky; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f21-20020a05620a409500b0076841128d10si1534543qko.533.2023.10.20.08.08.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 20 Oct 2023 08:08:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SHEfxeky; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtr5a-000681-4T; Fri, 20 Oct 2023 11:07:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtr5Y-00062A-3Y for qemu-devel@nongnu.org; Fri, 20 Oct 2023 11:07:00 -0400 Received: from mail-ed1-x532.google.com ([2a00:1450:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtr5W-0001OF-95 for qemu-devel@nongnu.org; Fri, 20 Oct 2023 11:06:59 -0400 Received: by mail-ed1-x532.google.com with SMTP id 4fb4d7f45d1cf-51e28cac164so4283141a12.1 for ; Fri, 20 Oct 2023 08:06:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697814416; x=1698419216; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DGRPHT/WBPalUJTx91B3yYyqtqOtvzDargUZTDcy7QI=; b=SHEfxekyZ7yfjC+tw7SoR2u9yjSim0obd62kJbpEeNNT0qqdH+mPa/13s6Y2M83YIy FqBmKxCllByLJ1VDTpkeH6koOL7GWdl4ZrGEEDFNnMHWh+sixCNRTZLpBgBsSEuvfjK5 3x243RYSkdglYsvqaYpN1PUwV2ObyNWFrvvhKrP+J3gWpan1avKOab6u0bY0TBhOqU8Q JlHHccj7cNJzMjZeSr+5Y0b+Zu6DYft9M+AJwP0EvJtM8gdMAAiCNLRy2wFMtXYDOn6u IkyJfOu+1EsEZS6HtninDZlmVM8zgfT0OKgiplxoSrhRTSK3Hj3M7m2m2LpMYB3apVIZ bBGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697814416; x=1698419216; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DGRPHT/WBPalUJTx91B3yYyqtqOtvzDargUZTDcy7QI=; b=fOS1KMNdLZHxZ1Yqo9R9jweIkP4XQmrQZwFLddNL0XnmcE9BW1TBJ4/1mBvNJNlRwJ z+/vQ4OgRMgQiNAWs00xgj0rb/CD4qdDGhAinUwMY4k1cP5V2Zir/4IWg8tgke7s43+l IGeKDplU2b16FCUyTVhTIsr6kJMlnG1s0vaBbim3EG5ruY+qV+tgrzFiggBbaRiRv+zU xJ3wGksTfLvtOhVqXKBcIKYHVmSXK9lXOEt6QBpGS5VDz4W9Q8I8SwW7jTvr+ZMYoN0L EfmEfW1nHOQ8Vehyj2uKawH4Tn7920NnoEL6f343T85gDixelQnv0zvju1Yf2Os8AOOA yqHg== X-Gm-Message-State: AOJu0Ywick0BvxHsZAzGJRBqt+aV6z+THTXlzSuvPLmiyg49vF3QaNF+ 1ZKK+NL7X/uCR74d9/UatU8vgnNDCybkYwYcdLA= X-Received: by 2002:a17:906:4fc7:b0:9bf:c00f:654a with SMTP id i7-20020a1709064fc700b009bfc00f654amr1755999ejw.24.1697814416331; Fri, 20 Oct 2023 08:06:56 -0700 (PDT) Received: from m1x-phil.lan (tbo33-h01-176-171-212-97.dsl.sta.abo.bbox.fr. [176.171.212.97]) by smtp.gmail.com with ESMTPSA id xa17-20020a170907b9d100b009b913aa7cdasm1665815ejc.92.2023.10.20.08.06.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 08:06:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Laurent Vivier , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 4/6] hw/m68k/mcf_intc: Pass CPU using QOM link property Date: Fri, 20 Oct 2023 17:06:24 +0200 Message-ID: <20231020150627.56893-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020150627.56893-1-philmd@linaro.org> References: <20231020150627.56893-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QOM objects shouldn't access each other internals fields except using the QOM API. Signed-off-by: Philippe Mathieu-Daudé Tested-by: Thomas Huth Reviewed-by: Thomas Huth --- hw/m68k/mcf_intc.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index 1f74ea0e14..1d3b34e18c 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -14,6 +14,7 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "hw/m68k/mcf.h" +#include "hw/qdev-properties.h" #include "qom/object.h" #define TYPE_MCF_INTC "mcf-intc" @@ -176,10 +177,17 @@ static void mcf_intc_instance_init(Object *obj) sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem); } +static Property mcf_intc_properties[] = { + DEFINE_PROP_LINK("m68k-cpu", mcf_intc_state, cpu, + TYPE_M68K_CPU, M68kCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void mcf_intc_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + device_class_set_props(dc, mcf_intc_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); dc->reset = mcf_intc_reset; } @@ -204,16 +212,13 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem, M68kCPU *cpu) { DeviceState *dev; - mcf_intc_state *s; dev = qdev_new(TYPE_MCF_INTC); + object_property_set_link(OBJECT(dev), "m68k-cpu", + OBJECT(cpu), &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - - s = MCF_INTC(dev); - s->cpu = cpu; - memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); - return qemu_allocate_irqs(mcf_intc_set_irq, s, 64); + return qemu_allocate_irqs(mcf_intc_set_irq, dev, 64); }