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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id r15-20020aa7962f000000b006889348ba6esm3796263pfg.127.2023.10.18.14.55.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 14:55:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH 61/61] target/hppa: Simplify trans_dep*_imm Date: Wed, 18 Oct 2023 14:51:35 -0700 Message-Id: <20231018215135.1561375-62-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018215135.1561375-1-richard.henderson@linaro.org> References: <20231018215135.1561375-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All of the special cases here are now handled during generic expansion. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 80 +++++++++++++---------------------------- 1 file changed, 25 insertions(+), 55 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index a9e0e1706f..e8ce41b5a7 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3473,80 +3473,50 @@ static bool trans_extr_imm(DisasContext *ctx, arg_extr_imm *a) return nullify_end(ctx); } -static bool trans_depi_imm(DisasContext *ctx, arg_depi_imm *a) +static bool do_dep_imm(DisasContext *ctx, unsigned rt, unsigned c, + bool d, unsigned len, unsigned cpos, + TCGv_i64 src, TCGv_i64 val) { - unsigned len, width; - uint64_t mask0, mask1; + unsigned width = d ? 64 : 32; TCGv_i64 dest; - if (!ctx->is_pa20 && a->d) { - return false; + if (cpos + len > width) { + len = width - cpos; } - if (a->c) { + + if (c) { nullify_over(ctx); } - len = a->len; - width = a->d ? 64 : 32; - if (a->cpos + len > width) { - len = width - a->cpos; - } + dest = dest_gpr(ctx, rt); + tcg_gen_deposit_i64(dest, src, val, cpos, len); + save_gpr(ctx, rt, dest); - dest = dest_gpr(ctx, a->t); - mask0 = deposit64(0, a->cpos, len, a->i); - mask1 = deposit64(-1, a->cpos, len, a->i); - - if (a->nz) { - TCGv_i64 src = load_gpr(ctx, a->t); - tcg_gen_andi_i64(dest, src, mask1); - tcg_gen_ori_i64(dest, dest, mask0); - } else { - tcg_gen_movi_i64(dest, mask0); - } - save_gpr(ctx, a->t, dest); - - /* Install the new nullification. */ cond_free(&ctx->null_cond); - if (a->c) { - ctx->null_cond = do_sed_cond(ctx, a->c, a->d, dest); + if (c) { + ctx->null_cond = do_sed_cond(ctx, c, d, dest); } return nullify_end(ctx); } -static bool trans_dep_imm(DisasContext *ctx, arg_dep_imm *a) +static bool trans_depi_imm(DisasContext *ctx, arg_depi_imm *a) { - unsigned rs = a->nz ? a->t : 0; - unsigned len, width; - TCGv_i64 dest, val; - if (!ctx->is_pa20 && a->d) { return false; } - if (a->c) { - nullify_over(ctx); - } + return do_dep_imm(ctx, a->t, a->c, a->d, a->len, a->cpos, + a->nz ? load_gpr(ctx, a->t) : ctx->zero, + tcg_constant_i64(a->i)); +} - len = a->len; - width = a->d ? 64 : 32; - if (a->cpos + len > width) { - len = width - a->cpos; +static bool trans_dep_imm(DisasContext *ctx, arg_dep_imm *a) +{ + if (!ctx->is_pa20 && a->d) { + return false; } - - dest = dest_gpr(ctx, a->t); - val = load_gpr(ctx, a->r); - if (rs == 0) { - tcg_gen_deposit_z_i64(dest, val, a->cpos, len); - } else { - tcg_gen_deposit_i64(dest, cpu_gr[rs], val, a->cpos, len); - } - save_gpr(ctx, a->t, dest); - - /* Install the new nullification. */ - cond_free(&ctx->null_cond); - if (a->c) { - ctx->null_cond = do_sed_cond(ctx, a->c, a->d, dest); - } - return nullify_end(ctx); + return do_dep_imm(ctx, a->t, a->c, a->d, a->len, a->cpos, + a->nz ? load_gpr(ctx, a->t) : ctx->zero, + load_gpr(ctx, a->r)); } static bool do_dep_sar(DisasContext *ctx, unsigned rt, unsigned c,