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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id w17-20020a63f511000000b005b61a024ec7sm2176380pgh.74.2023.10.18.14.51.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 14:51:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH 26/61] target/hppa: Pass d to do_unit_cond Date: Wed, 18 Oct 2023 14:51:00 -0700 Message-Id: <20231018215135.1561375-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018215135.1561375-1-richard.henderson@linaro.org> References: <20231018215135.1561375-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Hoist the resolution of d up one level above do_unit_cond. All computations are logical, and are simplified by using a mask of the correct width, after which the result may be compared with zero. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 1a51ac4869..8bea28f0fd 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -1056,11 +1056,12 @@ static DisasCond do_sed_cond(DisasContext *ctx, unsigned orig, bool d, /* Similar, but for unit conditions. */ -static DisasCond do_unit_cond(unsigned cf, TCGv_reg res, +static DisasCond do_unit_cond(unsigned cf, bool d, TCGv_reg res, TCGv_reg in1, TCGv_reg in2) { DisasCond cond; TCGv_reg tmp, cb = NULL; + target_ureg d_repl = d ? 0x0000000100000001ull : 1; if (cf & 8) { /* Since we want to test lots of carry-out bits all at once, do not @@ -1087,32 +1088,32 @@ static DisasCond do_unit_cond(unsigned cf, TCGv_reg res, * https://graphics.stanford.edu/~seander/bithacks.html#ZeroInWord */ tmp = tcg_temp_new(); - tcg_gen_subi_reg(tmp, res, 0x01010101u); + tcg_gen_subi_reg(tmp, res, d_repl * 0x01010101u); tcg_gen_andc_reg(tmp, tmp, res); - tcg_gen_andi_reg(tmp, tmp, 0x80808080u); + tcg_gen_andi_reg(tmp, tmp, d_repl * 0x80808080u); cond = cond_make_0(TCG_COND_NE, tmp); break; case 3: /* SHZ / NHZ */ tmp = tcg_temp_new(); - tcg_gen_subi_reg(tmp, res, 0x00010001u); + tcg_gen_subi_reg(tmp, res, d_repl * 0x00010001u); tcg_gen_andc_reg(tmp, tmp, res); - tcg_gen_andi_reg(tmp, tmp, 0x80008000u); + tcg_gen_andi_reg(tmp, tmp, d_repl * 0x80008000u); cond = cond_make_0(TCG_COND_NE, tmp); break; case 4: /* SDC / NDC */ - tcg_gen_andi_reg(cb, cb, 0x88888888u); + tcg_gen_andi_reg(cb, cb, d_repl * 0x88888888u); cond = cond_make_0(TCG_COND_NE, cb); break; case 6: /* SBC / NBC */ - tcg_gen_andi_reg(cb, cb, 0x80808080u); + tcg_gen_andi_reg(cb, cb, d_repl * 0x80808080u); cond = cond_make_0(TCG_COND_NE, cb); break; case 7: /* SHC / NHC */ - tcg_gen_andi_reg(cb, cb, 0x80008000u); + tcg_gen_andi_reg(cb, cb, d_repl * 0x80008000u); cond = cond_make_0(TCG_COND_NE, cb); break; @@ -1428,6 +1429,7 @@ static void do_unit(DisasContext *ctx, unsigned rt, TCGv_reg in1, { TCGv_reg dest; DisasCond cond; + bool d = false; if (cf == 0) { dest = dest_gpr(ctx, rt); @@ -1438,7 +1440,7 @@ static void do_unit(DisasContext *ctx, unsigned rt, TCGv_reg in1, dest = tcg_temp_new(); fn(dest, in1, in2); - cond = do_unit_cond(cf, dest, in1, in2); + cond = do_unit_cond(cf, d, dest, in1, in2); if (is_tc) { TCGv_reg tmp = tcg_temp_new();