From patchwork Tue Oct 17 12:38:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 734378 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp455364wro; Tue, 17 Oct 2023 05:39:35 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE4XrfYUVs2W9W+8R5KoheAPsozxVtxgJYqaEzqZUmOIwcKmzsvN8O91H/9U0fg1AsNMLST X-Received: by 2002:adf:f48a:0:b0:32d:b732:8d49 with SMTP id l10-20020adff48a000000b0032db7328d49mr1874385wro.28.1697546375637; Tue, 17 Oct 2023 05:39:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697546375; cv=none; d=google.com; s=arc-20160816; b=skofPLsDpMCYc0NIZCy/cgNi0HHGouVDK+xs0y7aU8QTk4hGBVWx3Rggsh2VOzZs6r dTqfJK7TaNqUyiPVmhcdC/jd/jUJb7v99CrOsImoN2B1JFKd6iUmSZIabuB+QVGpBT2t WxVr3O9MOkFsW9Upw5F6pOyaRvzh6pk5jJECa6SQgVpp0jrf/z+nsTYIanGug9mSZ/pB 89b7pOHY0pC5AFAViE8ET1LpeMlZ9Z4+OSCMdzBJW71DE8e1x9Kk3C5ORHJEQrg+C5gl K/MgInTbrz1bwMnsz60kFLIlk54fYRbqd6wkY/zwqDcFK+w47OYeDUStUBwBKNw2vxyq n//w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ieYLwocsfjjZTkdy/ghGoFyoMGNTUK0znPSRouPjdQc=; fh=8Jtqnl8DPQpOT1++QNNdj/Kme8FEkJ+K5a68uDVfR0I=; b=fujVAb91NtZnTza4R3ZY54+HJdYWO4olw6+znURuGmYjVRu9nmFpjE5yrPK94uhJRN fsF5hFD8spFu4hOZKl1emefRuKSkVSnin6andG4VTxuRQpZp8yH2Kd1X2xrpekF6Z3Nq 57kHxPzoox14vehB9VIFSgceExc2Yv+FZ+mDwxpnr+UfkQww21tFtKl94TzvnBNGIa66 jqQqNloDfLX0YRwuxxl5KSJf0UTowEcM2MAluvzZWG8fV9+A9tPLyUOiDW62unudSuX1 pU7xYnevQMI9xH8Zlc0FaFvr2JdXpnOJKLCyIiBrRLhRb52CKfxttrGtHjYJYZu4vZgC t8sg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="K7sq63H/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f19-20020adfb613000000b0031f8a05b832si928636wre.16.2023.10.17.05.39.35 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 17 Oct 2023 05:39:35 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="K7sq63H/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qsjLq-00036W-Do; Tue, 17 Oct 2023 08:39:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qsjLn-00031u-E0 for qemu-devel@nongnu.org; Tue, 17 Oct 2023 08:39:07 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qsjLl-0007CQ-VW for qemu-devel@nongnu.org; Tue, 17 Oct 2023 08:39:07 -0400 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-40684f53bfcso51026165e9.0 for ; Tue, 17 Oct 2023 05:39:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697546344; x=1698151144; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ieYLwocsfjjZTkdy/ghGoFyoMGNTUK0znPSRouPjdQc=; b=K7sq63H/ZDjDbiH2jCMlwfqrVp6iiDwjdjLatghTaGVlq4j051VYJUdi3Tge/x8QuN tLYVLUXTO31VzXmB9VbOVMcD1s0UMGqDFtBus3erl7VCdGt5/M4AYJ8uNMUsffV04CXB VdwTJdjBOJLPwYeeD5CwatCOG3YcncFVhTRJ+CQdhJbN3t9MF4vbsVMqCoSqxFdbO4uJ lnz30oOGpzmliaEBNwdl3ZiHl+5Lf/lohGxz32aEqY3KzGJHLQHhs/q2kWG6x88YqySg flWgWF7PU9ZnTVNfJhoNgzoWuqqihpBnluNNg+Yz2o4zY13KG9YzKxN5p3aCHlr3lmnz nt2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697546344; x=1698151144; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ieYLwocsfjjZTkdy/ghGoFyoMGNTUK0znPSRouPjdQc=; b=pGyxfQroc5X2eu986jvhwPvhXIX3kBdv2G/KPaaI2OPimenEkViipoLEXOy7BQbZSo 18JxIE+GjYrOATN7eVtkF30ehjhRzIlMgkIURxF2RmWevWdlRFZjcBfwBsdeN5jZ+qSC tLuIUiJoqF0aYP2am8inko9CbJYlexopOPFptXM0jeszcdQreP6zcwEkxISB7PWID0ti lnBTfxZb6kS/E4Cij/DcvrixhUuLrhvs2++sBk0XmF+rphDgPOubu8VJPHwfsZZVgIpW R60NG3ssZH/NQPXt9riCPJeFSlrnv/yb+QT4ckw1tj4qJ3TVu3FeT99sn01z+CZgl52E 3LcA== X-Gm-Message-State: AOJu0YyCqtEXX+XEwVo8YiYyeCdR5Uc5H6/R12L914PfrjoTPK/X01QM XzFVEuQECcgPpWBBDD5BenDiep4CnkH5+Y2E7aM7eQ== X-Received: by 2002:a05:600c:3b05:b0:401:b6f6:d8fd with SMTP id m5-20020a05600c3b0500b00401b6f6d8fdmr1627616wms.6.1697546344409; Tue, 17 Oct 2023 05:39:04 -0700 (PDT) Received: from m1x-phil.lan ([176.172.118.33]) by smtp.gmail.com with ESMTPSA id j5-20020a05600c1c0500b003fe1c332810sm9900134wms.33.2023.10.17.05.39.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 17 Oct 2023 05:39:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Song Gao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 2/2] target/loongarch: Use i128 for 128-bit load/store in XVLD Date: Tue, 17 Oct 2023 14:38:49 +0200 Message-ID: <20231017123849.40834-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231017123849.40834-1-philmd@linaro.org> References: <20231017123849.40834-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/translate.c | 6 ++++++ target/loongarch/insn_trans/trans_vec.c.inc | 16 +++++++--------- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c index c6edfc800f..89e35770b7 100644 --- a/target/loongarch/translate.c +++ b/target/loongarch/translate.c @@ -67,6 +67,12 @@ static inline void get_vreg128(TCGv_i128 dest, int regno, int index) offsetof(CPULoongArchState, fpr[regno].vreg.Q(index))); } +static inline void set_vreg128(TCGv_i128 src, int regno, int index) +{ + tcg_gen_st_i128(src, tcg_env, + offsetof(CPULoongArchState, fpr[regno].vreg.Q(index))); +} + static inline int plus_1(DisasContext *ctx, int x) { return x + 1; diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch/insn_trans/trans_vec.c.inc index dd41f5e48e..c8b7bfa67f 100644 --- a/target/loongarch/insn_trans/trans_vec.c.inc +++ b/target/loongarch/insn_trans/trans_vec.c.inc @@ -5458,18 +5458,16 @@ static bool gen_lasx_memory(DisasContext *ctx, arg_vr_i *a, static void gen_xvld(DisasContext *ctx, int vreg, TCGv addr) { - int i; + MemOp mop = MO_128 | MO_TE; TCGv temp = tcg_temp_new(); - TCGv dest = tcg_temp_new(); + TCGv_i128 dest = tcg_temp_new_i128(); - tcg_gen_qemu_ld_i64(dest, addr, ctx->mem_idx, MO_TEUQ); - set_vreg64(dest, vreg, 0); + tcg_gen_qemu_ld_i128(dest, addr, ctx->mem_idx, mop); + set_vreg128(dest, vreg, 0); - for (i = 1; i < 4; i++) { - tcg_gen_addi_tl(temp, addr, 8 * i); - tcg_gen_qemu_ld_i64(dest, temp, ctx->mem_idx, MO_TEUQ); - set_vreg64(dest, vreg, i); - } + tcg_gen_addi_tl(temp, addr, 16); + tcg_gen_qemu_ld_i128(dest, temp, ctx->mem_idx, mop); + set_vreg128(dest, vreg, 1); } static void gen_xvst(DisasContext * ctx, int vreg, TCGv addr)