@@ -261,6 +261,7 @@ FdTOx 10 ..... 110100 00000 0 1000 0010 ..... @r_r2
FqTOx 10 ..... 110100 00000 0 1000 0011 ..... @r_r2
FxTOs 10 ..... 110100 00000 0 1000 0100 ..... @r_r2
FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2
+FxTOq 10 ..... 110100 00000 0 1000 1100 ..... @r_r2
FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2
FdTOs 10 ..... 110100 00000 0 1100 0110 ..... @r_r2
FqTOs 10 ..... 110100 00000 0 1100 0111 ..... @r_r2
@@ -269,6 +270,7 @@ FsTOd 10 ..... 110100 00000 0 1100 1001 ..... @r_r2
FqTOd 10 ..... 110100 00000 0 1100 1011 ..... @r_r2
FiTOq 10 ..... 110100 00000 0 1100 1100 ..... @r_r2
FsTOq 10 ..... 110100 00000 0 1100 1101 ..... @r_r2
+FdTOq 10 ..... 110100 00000 0 1100 1110 ..... @r_r2
FsTOi 10 ..... 110100 00000 0 1101 0001 ..... @r_r2
FdTOi 10 ..... 110100 00000 0 1101 0010 ..... @r_r2
FqTOi 10 ..... 110100 00000 0 1101 0011 ..... @r_r2
@@ -60,6 +60,7 @@
#define gen_helper_fqtox ({ qemu_build_not_reached(); NULL; })
#define gen_helper_fxtod ({ qemu_build_not_reached(); NULL; })
#define gen_helper_fxtos ({ qemu_build_not_reached(); NULL; })
+#define gen_helper_fxtoq ({ qemu_build_not_reached(); NULL; })
#define gen_helper_done(E) qemu_build_not_reached()
#define gen_helper_retry(E) qemu_build_not_reached()
#define gen_helper_udivx(D, E, A, B) qemu_build_not_reached()
@@ -1542,19 +1543,6 @@ static void gen_ne_fop_QQ(DisasContext *dc, int rd, int rs,
}
#endif
-static void gen_ne_fop_QD(DisasContext *dc, int rd, int rs,
- void (*gen)(TCGv_ptr, TCGv_i64))
-{
- TCGv_i64 src;
-
- src = gen_load_fpr_D(dc, rs);
-
- gen(tcg_env, src);
-
- gen_op_store_QT0_fpr(QFPREG(rd));
- gen_update_fprs_dirty(dc, QFPREG(rd));
-}
-
/* asi moves */
typedef enum {
GET_ASI_HELPER,
@@ -4798,6 +4786,29 @@ static bool do_env_qf(DisasContext *dc, arg_r_r *a,
TRANS(FiTOq, ALL, do_env_qf, a, gen_helper_fitoq)
TRANS(FsTOq, ALL, do_env_qf, a, gen_helper_fstoq)
+static bool do_env_qd(DisasContext *dc, arg_r_r *a,
+ void (*func)(TCGv_env, TCGv_i64))
+{
+ TCGv_i64 src;
+
+ if (gen_trap_ifnofpu(dc)) {
+ return true;
+ }
+ if (gen_trap_float128(dc)) {
+ return true;
+ }
+
+ gen_op_clear_ieee_excp_and_FTT();
+ src = gen_load_fpr_D(dc, a->rs);
+ func(tcg_env, src);
+ gen_op_store_QT0_fpr(QFPREG(a->rd));
+ gen_update_fprs_dirty(dc, QFPREG(a->rd));
+ return advance_pc(dc);
+}
+
+TRANS(FdTOq, ALL, do_env_qd, a, gen_helper_fdtoq)
+TRANS(FxTOq, 64, do_env_qd, a, gen_helper_fxtoq)
+
static bool do_fff(DisasContext *dc, arg_r_r_r *a,
void (*func)(TCGv_i32, TCGv_i32, TCGv_i32))
{
@@ -5085,11 +5096,9 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0x83: /* V9 fqtox */
case 0xcc: /* fitoq */
case 0xcd: /* fstoq */
- g_assert_not_reached(); /* in decodetree */
case 0xce: /* fdtoq */
- CHECK_FPU_FEATURE(dc, FLOAT128);
- gen_ne_fop_QD(dc, rd, rs2, gen_helper_fdtoq);
- break;
+ case 0x8c: /* V9 fxtoq */
+ g_assert_not_reached(); /* in decodetree */
#ifdef TARGET_SPARC64
case 0x3: /* V9 fmovq */
CHECK_FPU_FEATURE(dc, FLOAT128);
@@ -5103,10 +5112,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
CHECK_FPU_FEATURE(dc, FLOAT128);
gen_ne_fop_QQ(dc, rd, rs2, gen_helper_fabsq);
break;
- case 0x8c: /* V9 fxtoq */
- CHECK_FPU_FEATURE(dc, FLOAT128);
- gen_ne_fop_QD(dc, rd, rs2, gen_helper_fxtoq);
- break;
#endif
default:
goto illegal_insn;
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 47 ++++++++++++++++++++++----------------- 2 files changed, 28 insertions(+), 21 deletions(-)